i965/vec4: Make with_writemask() non-static.

[mesa.git] / src / mesa / drivers / dri / i965 / intel_fbo.c

diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
index 9fbd12a68cfacc48cb7cea1ef4d4cce6dc026d7a..1692325903b0600f62019fa08751015ce74a75b7 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -192,7 +192,6 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer
                                  GLuint width, GLuint height)
 {
    struct brw_context *brw = brw_context(ctx);
-   struct intel_context *intel = intel_context(ctx);
    struct intel_screen *screen = brw->intelScreen;
    struct intel_renderbuffer *irb = intel_renderbuffer(rb);
    rb->NumSamples = intel_quantize_num_samples(screen, rb->NumSamples);
@@ -262,6 +261,20 @@ intel_image_target_renderbuffer_storage(struct gl_context *ctx,
    if (image == NULL)
       return;
 
+   if (image->planar_format && image->planar_format->nplanes > 1) {
+      _mesa_error(ctx, GL_INVALID_OPERATION,
+            "glEGLImageTargetRenderbufferStorage(planar buffers are not "
+               "supported as render targets.");
+      return;
+   }
+
+   /* Buffers originating from outside are for read-only. */
+   if (image->dma_buf_imported) {
+      _mesa_error(ctx, GL_INVALID_OPERATION,
+            "glEGLImageTargetRenderbufferStorage(dma buffers are read-only)");
+      return;
+   }
+
    /* __DRIimage is opaque to the core so it has to be checked here */
    switch (image->format) {
    case MESA_FORMAT_RGBA8888_REV:
@@ -385,7 +398,6 @@ intel_create_private_renderbuffer(gl_format format, unsigned num_samples)
 static struct gl_renderbuffer *
 intel_new_renderbuffer(struct gl_context * ctx, GLuint name)
 {
-   /*struct intel_context *intel = intel_context(ctx); */
    struct intel_renderbuffer *irb;
    struct gl_renderbuffer *rb;
 
@@ -551,7 +563,6 @@ static void
 intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb)
 {
    struct brw_context *brw = brw_context(ctx);
-   struct intel_context *intel = intel_context(ctx);
    struct intel_renderbuffer *depthRb =
       intel_get_renderbuffer(fb, BUFFER_DEPTH);
    struct intel_renderbuffer *stencilRb =
@@ -572,6 +583,22 @@ intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb)
    }
 
    if (depth_mt && stencil_mt) {
+      if (brw->gen >= 7) {
+         /* For gen >= 7, we are using the lod/minimum-array-element fields
+          * and supportting layered rendering. This means that we must restrict
+          * the depth & stencil attachments to match in various more retrictive
+          * ways. (width, height, depth, LOD and layer)
+          */
+        if (depth_mt->physical_width0 != stencil_mt->physical_width0 ||
+             depth_mt->physical_height0 != stencil_mt->physical_height0 ||
+             depth_mt->physical_depth0 != stencil_mt->physical_depth0 ||
+             depthRb->mt_level != stencilRb->mt_level ||
+            depthRb->mt_layer != stencilRb->mt_layer) {
+           fbo_incomplete(fb,
+                           "FBO incomplete: depth and stencil must match in"
+                           "width, height, depth, LOD and layer\n");
+        }
+      }
       if (depth_mt == stencil_mt) {
         /* For true packed depth/stencil (not faked on prefers-separate-stencil
          * hardware) we need to be sure they're the same level/layer, since
@@ -597,7 +624,7 @@ intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb)
                            "instead of S8\n",
                            _mesa_get_format_name(stencil_mt->format));
         }
-        if (intel->gen < 7 && !intel_renderbuffer_has_hiz(depthRb)) {
+        if (brw->gen < 7 && !intel_renderbuffer_has_hiz(depthRb)) {
            /* Before Gen7, separate depth and stencil buffers can be used
             * only if HiZ is enabled. From the Sandybridge PRM, Volume 2,
             * Part 1, Bit 3DSTATE_DEPTH_BUFFER.SeparateStencilBufferEnable:
@@ -668,6 +695,11 @@ intel_blit_framebuffer_with_blitter(struct gl_context *ctx,
 {
    struct brw_context *brw = brw_context(ctx);
 
+   /* Sync up the state of window system buffers.  We need to do this before
+    * we go looking for the buffers.
+    */
+   intel_prepare_render(brw);
+
    if (mask & GL_COLOR_BUFFER_BIT) {
       GLint i;
       const struct gl_framebuffer *drawFb = ctx->DrawBuffer;
@@ -794,26 +826,6 @@ intel_renderbuffer_has_hiz(struct intel_renderbuffer *irb)
    return intel_miptree_slice_has_hiz(irb->mt, irb->mt_level, irb->mt_layer);
 }
 
-void
-intel_renderbuffer_set_needs_hiz_resolve(struct intel_renderbuffer *irb)
-{
-   if (irb->mt) {
-      intel_miptree_slice_set_needs_hiz_resolve(irb->mt,
-                                                irb->mt_level,
-                                                irb->mt_layer);
-   }
-}
-
-void
-intel_renderbuffer_set_needs_depth_resolve(struct intel_renderbuffer *irb)
-{
-   if (irb->mt) {
-      intel_miptree_slice_set_needs_depth_resolve(irb->mt,
-                                                  irb->mt_level,
-                                                  irb->mt_layer);
-   }
-}
-
 bool
 intel_renderbuffer_resolve_hiz(struct brw_context *brw,
                               struct intel_renderbuffer *irb)
@@ -827,6 +839,21 @@ intel_renderbuffer_resolve_hiz(struct brw_context *brw,
    return false;
 }
 
+void
+intel_renderbuffer_att_set_needs_depth_resolve(struct gl_renderbuffer_attachment *att)
+{
+   struct intel_renderbuffer *irb = intel_renderbuffer(att->Renderbuffer);
+   if (irb->mt) {
+      if (att->Layered) {
+         intel_miptree_set_all_slices_need_depth_resolve(irb->mt, irb->mt_level);
+      } else {
+         intel_miptree_slice_set_needs_depth_resolve(irb->mt,
+                                                     irb->mt_level,
+                                                     irb->mt_layer);
+      }
+   }
+}
+
 bool
 intel_renderbuffer_resolve_depth(struct brw_context *brw,
                                 struct intel_renderbuffer *irb)
@@ -879,7 +906,7 @@ intel_renderbuffer_move_to_temp(struct brw_context *brw,
 void
 intel_fbo_init(struct brw_context *brw)
 {
-   struct dd_function_table *dd = &brw->intel.ctx.Driver;
+   struct dd_function_table *dd = &brw->ctx.Driver;
    dd->NewFramebuffer = intel_new_framebuffer;
    dd->NewRenderbuffer = intel_new_renderbuffer;
    dd->MapRenderbuffer = intel_map_renderbuffer;