*/
#include "main/enums.h"
-#include "main/imports.h"
#include "main/macros.h"
#include "main/mtypes.h"
#include "main/fbobject.h"
#include "main/condrender.h"
#include "util/hash_table.h"
#include "util/set.h"
+#include "util/u_memory.h"
#include "swrast/swrast.h"
#include "drivers/common/meta.h"
GLuint x, GLuint y, GLuint w, GLuint h,
GLbitfield mode,
GLubyte **out_map,
- GLint *out_stride)
+ GLint *out_stride,
+ bool flip_y)
{
struct brw_context *brw = brw_context(ctx);
struct swrast_renderbuffer *srb = (struct swrast_renderbuffer *)rb;
irb->singlesample_mt =
intel_miptree_create_for_renderbuffer(brw, irb->mt->format,
rb->Width, rb->Height,
- 0 /*num_samples*/);
+ 1 /*num_samples*/);
if (!irb->singlesample_mt)
goto fail;
irb->singlesample_mt_is_tmp = true;
* upside-down. So we need to ask for a rectangle on flipped vertically, and
* we then return a pointer to the bottom of it with a negative stride.
*/
- if (rb->Name == 0) {
+ if (flip_y) {
y = rb->Height - y - h;
}
intel_miptree_map(brw, mt, irb->mt_level, irb->mt_layer,
x, y, w, h, mode, &map, &stride);
- if (rb->Name == 0) {
+ if (flip_y) {
map += (h - 1) * stride;
stride = -stride;
}
intel_renderbuffer_format(struct gl_context * ctx, GLenum internalFormat)
{
struct brw_context *brw = brw_context(ctx);
+ ASSERTED const struct gen_device_info *devinfo = &brw->screen->devinfo;
switch (internalFormat) {
default:
if (brw->has_separate_stencil) {
return MESA_FORMAT_S_UINT8;
} else {
- assert(!brw->must_use_separate_stencil);
+ assert(!devinfo->must_use_separate_stencil);
return MESA_FORMAT_Z24_UNORM_S8_UINT;
}
}
assert(rb->Format != MESA_FORMAT_NONE);
rb->NumSamples = intel_quantize_num_samples(screen, rb->NumSamples);
+ rb->NumStorageSamples = rb->NumSamples;
rb->Width = width;
rb->Height = height;
rb->_BaseFormat = _mesa_get_format_base_format(rb->Format);
irb->mt = intel_miptree_create_for_renderbuffer(brw, rb->Format,
width, height,
- rb->NumSamples);
+ MAX2(rb->NumSamples, 1));
if (!irb->mt)
return false;
return intel_alloc_private_renderbuffer_storage(ctx, rb, internalFormat, width, height);
}
+static mesa_format
+fallback_rgbx_to_rgba(struct intel_screen *screen, struct gl_renderbuffer *rb,
+ mesa_format original_format)
+{
+ mesa_format format = original_format;
+
+ /* The base format and internal format must be derived from the user-visible
+ * format (that is, the gl_config's format), even if we internally use
+ * choose a different format for the renderbuffer. Otherwise, rendering may
+ * use incorrect channel write masks.
+ */
+ rb->_BaseFormat = _mesa_get_format_base_format(original_format);
+ rb->InternalFormat = rb->_BaseFormat;
+
+ if (!screen->mesa_format_supports_render[original_format]) {
+ /* The glRenderbufferStorage paths in core Mesa detect if the driver
+ * does not support the user-requested format, and then searches for
+ * a fallback format. The DRI code bypasses core Mesa, though. So we do
+ * the fallbacks here.
+ *
+ * We must support MESA_FORMAT_R8G8B8X8 on Android because the Android
+ * framework requires HAL_PIXEL_FORMAT_RGBX8888 winsys surfaces.
+ */
+ format = _mesa_format_fallback_rgbx_to_rgba(original_format);
+ assert(screen->mesa_format_supports_render[format]);
+ }
+ return format;
+}
+
static void
intel_image_target_renderbuffer_storage(struct gl_context *ctx,
struct gl_renderbuffer *rb,
return;
}
+ rb->Format = fallback_rgbx_to_rgba(brw->screen, rb, image->format);
+
+ mesa_format chosen_format = rb->Format == image->format ?
+ image->format : rb->Format;
+
/* __DRIimage is opaque to the core so it has to be checked here */
- if (!brw->mesa_format_supports_render[image->format]) {
+ if (!brw->mesa_format_supports_render[chosen_format]) {
_mesa_error(ctx, GL_INVALID_OPERATION,
"glEGLImageTargetRenderbufferStorage(unsupported image format)");
return;
* content.
*/
irb->mt = intel_miptree_create_for_dri_image(brw, image, GL_TEXTURE_2D,
- ISL_COLORSPACE_NONE);
+ rb->Format, false);
if (!irb->mt)
return;
- rb->InternalFormat = image->internal_format;
rb->Width = image->width;
rb->Height = image->height;
- rb->Format = image->format;
- rb->_BaseFormat = _mesa_get_format_base_format(image->format);
rb->NeedsFinishRenderTexture = true;
irb->layer_count = 1;
}
_mesa_init_renderbuffer(rb, 0);
rb->ClassID = INTEL_RB_CLASS;
rb->NumSamples = num_samples;
+ rb->NumStorageSamples = num_samples;
- /* The base format and internal format must be derived from the user-visible
- * format (that is, the gl_config's format), even if we internally use
- * choose a different format for the renderbuffer. Otherwise, rendering may
- * use incorrect channel write masks.
- */
- rb->_BaseFormat = _mesa_get_format_base_format(format);
- rb->InternalFormat = rb->_BaseFormat;
-
- rb->Format = format;
- if (!screen->mesa_format_supports_render[rb->Format]) {
- /* The glRenderbufferStorage paths in core Mesa detect if the driver
- * does not support the user-requested format, and then searches for
- * a falback format. The DRI code bypasses core Mesa, though. So we do
- * the fallbacks here.
- *
- * We must support MESA_FORMAT_R8G8B8X8 on Android because the Android
- * framework requires HAL_PIXEL_FORMAT_RGBX8888 winsys surfaces.
- */
- rb->Format = _mesa_format_fallback_rgbx_to_rgba(rb->Format);
- assert(screen->mesa_format_supports_render[rb->Format]);
- }
+ rb->Format = fallback_rgbx_to_rgba(screen, rb, format);
/* intel-specific methods */
rb->Delete = intel_delete_renderbuffer;
intel_miptree_check_level_layer(mt, level, layer);
irb->mt_level = level;
-
- int layer_multiplier;
- switch (mt->msaa_layout) {
- case INTEL_MSAA_LAYOUT_UMS:
- case INTEL_MSAA_LAYOUT_CMS:
- layer_multiplier = MAX2(mt->num_samples, 1);
- break;
-
- default:
- layer_multiplier = 1;
- }
-
- irb->mt_layer = layer_multiplier * layer;
+ irb->mt_layer = layer;
if (!layered) {
irb->layer_count = 1;
} else if (mt->target != GL_TEXTURE_3D && image->TexObject->NumLayers > 0) {
irb->layer_count = image->TexObject->NumLayers;
} else {
- irb->layer_count = mt->level[level].depth / layer_multiplier;
+ irb->layer_count = mt->surf.dim == ISL_SURF_DIM_3D ?
+ minify(mt->surf.logical_level0_px.depth, level) :
+ mt->surf.logical_level0_px.array_len;
}
intel_miptree_reference(&irb->mt, mt);
intel_renderbuffer_set_draw_offset(irb);
- if (mt->aux_usage == ISL_AUX_USAGE_HIZ && !mt->hiz_buf) {
- intel_miptree_alloc_hiz(brw, mt);
- if (!mt->hiz_buf)
- return false;
- }
-
return true;
}
}
-#define fbo_incomplete(fb, ...) do { \
+#define fbo_incomplete(fb, error_id, ...) do { \
static GLuint msg_id = 0; \
if (unlikely(ctx->Const.ContextFlags & GL_CONTEXT_FLAG_DEBUG_BIT)) { \
- _mesa_gl_debug(ctx, &msg_id, \
- MESA_DEBUG_SOURCE_API, \
- MESA_DEBUG_TYPE_OTHER, \
- MESA_DEBUG_SEVERITY_MEDIUM, \
- __VA_ARGS__); \
+ _mesa_gl_debugf(ctx, &msg_id, \
+ MESA_DEBUG_SOURCE_API, \
+ MESA_DEBUG_TYPE_OTHER, \
+ MESA_DEBUG_SEVERITY_MEDIUM, \
+ __VA_ARGS__); \
} \
DBG(__VA_ARGS__); \
- fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED; \
+ fb->_Status = error_id; \
} while (0)
/**
intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb)
{
struct brw_context *brw = brw_context(ctx);
+ const struct gen_device_info *devinfo = &brw->screen->devinfo;
struct intel_renderbuffer *depthRb =
intel_get_renderbuffer(fb, BUFFER_DEPTH);
struct intel_renderbuffer *stencilRb =
}
if (depth_mt && stencil_mt) {
- if (brw->gen >= 6) {
- unsigned d_width, d_height, d_depth;
- unsigned s_width, s_height, s_depth;
-
- if (depth_mt->surf.size > 0) {
- d_width = depth_mt->surf.phys_level0_sa.width;
- d_height = depth_mt->surf.phys_level0_sa.height;
- d_depth = depth_mt->surf.dim == ISL_SURF_DIM_3D ?
- depth_mt->surf.phys_level0_sa.depth :
- depth_mt->surf.phys_level0_sa.array_len;
- } else {
- d_width = depth_mt->physical_width0;
- d_height = depth_mt->physical_height0;
- d_depth = depth_mt->physical_depth0;
- }
-
- if (stencil_mt->surf.size > 0) {
- s_width = stencil_mt->surf.phys_level0_sa.width;
- s_height = stencil_mt->surf.phys_level0_sa.height;
- s_depth = stencil_mt->surf.dim == ISL_SURF_DIM_3D ?
- stencil_mt->surf.phys_level0_sa.depth :
- stencil_mt->surf.phys_level0_sa.array_len;
- } else {
- s_width = stencil_mt->physical_width0;
- s_height = stencil_mt->physical_height0;
- s_depth = stencil_mt->physical_depth0;
- }
+ if (devinfo->gen >= 6) {
+ const unsigned d_width = depth_mt->surf.phys_level0_sa.width;
+ const unsigned d_height = depth_mt->surf.phys_level0_sa.height;
+ const unsigned d_depth = depth_mt->surf.dim == ISL_SURF_DIM_3D ?
+ depth_mt->surf.phys_level0_sa.depth :
+ depth_mt->surf.phys_level0_sa.array_len;
+
+ const unsigned s_width = stencil_mt->surf.phys_level0_sa.width;
+ const unsigned s_height = stencil_mt->surf.phys_level0_sa.height;
+ const unsigned s_depth = stencil_mt->surf.dim == ISL_SURF_DIM_3D ?
+ stencil_mt->surf.phys_level0_sa.depth :
+ stencil_mt->surf.phys_level0_sa.array_len;
/* For gen >= 6, we are using the lod/minimum-array-element fields
* and supporting layered rendering. This means that we must restrict
d_depth != s_depth ||
depthRb->mt_level != stencilRb->mt_level ||
depthRb->mt_layer != stencilRb->mt_layer) {
- fbo_incomplete(fb,
+ fbo_incomplete(fb, GL_FRAMEBUFFER_UNSUPPORTED,
"FBO incomplete: depth and stencil must match in"
"width, height, depth, LOD and layer\n");
}
*/
if (depthRb->mt_level != stencilRb->mt_level ||
depthRb->mt_layer != stencilRb->mt_layer) {
- fbo_incomplete(fb,
+ fbo_incomplete(fb, GL_FRAMEBUFFER_UNSUPPORTED,
"FBO incomplete: depth image level/layer %d/%d != "
"stencil image %d/%d\n",
depthRb->mt_level,
}
} else {
if (!brw->has_separate_stencil) {
- fbo_incomplete(fb, "FBO incomplete: separate stencil "
- "unsupported\n");
+ fbo_incomplete(fb, GL_FRAMEBUFFER_UNSUPPORTED,
+ "FBO incomplete: separate stencil unsupported\n");
}
if (stencil_mt->format != MESA_FORMAT_S_UINT8) {
- fbo_incomplete(fb, "FBO incomplete: separate stencil is %s "
- "instead of S8\n",
- _mesa_get_format_name(stencil_mt->format));
+ fbo_incomplete(fb, GL_FRAMEBUFFER_UNSUPPORTED,
+ "FBO incomplete: separate stencil is %s "
+ "instead of S8\n",
+ _mesa_get_format_name(stencil_mt->format));
}
- if (brw->gen < 7 && !intel_renderbuffer_has_hiz(depthRb)) {
+ if (devinfo->gen < 7 && !intel_renderbuffer_has_hiz(depthRb)) {
/* Before Gen7, separate depth and stencil buffers can be used
* only if HiZ is enabled. From the Sandybridge PRM, Volume 2,
* Part 1, Bit 3DSTATE_DEPTH_BUFFER.SeparateStencilBufferEnable:
* [DevSNB]: This field must be set to the same value (enabled
* or disabled) as Hierarchical Depth Buffer Enable.
*/
- fbo_incomplete(fb, "FBO incomplete: separate stencil "
- "without HiZ\n");
+ fbo_incomplete(fb, GL_FRAMEBUFFER_UNSUPPORTED,
+ "FBO incomplete: separate stencil without HiZ\n");
}
}
}
*/
rb = fb->Attachment[i].Renderbuffer;
if (rb == NULL) {
- fbo_incomplete(fb, "FBO incomplete: attachment without "
- "renderbuffer\n");
+ fbo_incomplete(fb, GL_FRAMEBUFFER_UNSUPPORTED,
+ "FBO incomplete: attachment without "
+ "renderbuffer\n");
continue;
}
if (fb->Attachment[i].Type == GL_TEXTURE) {
if (rb->TexImage->Border) {
- fbo_incomplete(fb, "FBO incomplete: texture with border\n");
+ fbo_incomplete(fb, GL_FRAMEBUFFER_UNSUPPORTED,
+ "FBO incomplete: texture with border\n");
continue;
}
}
irb = intel_renderbuffer(rb);
if (irb == NULL) {
- fbo_incomplete(fb, "FBO incomplete: software rendering "
- "renderbuffer\n");
+ fbo_incomplete(fb, GL_FRAMEBUFFER_UNSUPPORTED,
+ "FBO incomplete: software rendering renderbuffer\n");
continue;
}
+ if (rb->Format == MESA_FORMAT_R_SRGB8) {
+ fbo_incomplete(fb, GL_FRAMEBUFFER_INCOMPLETE_ATTACHMENT,
+ "FBO incomplete: Format not color renderable: %s\n",
+ _mesa_get_format_name(rb->Format));
+ continue;
+ }
+
if (!brw_render_target_supported(brw, rb)) {
- fbo_incomplete(fb, "FBO incomplete: Unsupported HW "
- "texture/renderbuffer format attached: %s\n",
- _mesa_get_format_name(intel_rb_format(irb)));
+ fbo_incomplete(fb, GL_FRAMEBUFFER_UNSUPPORTED,
+ "FBO incomplete: Unsupported HW "
+ "texture/renderbuffer format attached: %s\n",
+ _mesa_get_format_name(intel_rb_format(irb)));
}
}
}
}
if (ctx->Color.sRGBEnabled &&
- _mesa_get_format_color_encoding(src_irb->mt->format) !=
- _mesa_get_format_color_encoding(dst_irb->mt->format)) {
+ _mesa_is_format_srgb(src_irb->mt->format) !=
+ _mesa_is_format_srgb(dst_irb->mt->format)) {
perf_debug("glBlitFramebuffer() with sRGB conversion cannot be "
"handled by BLT path.\n");
return mask;
if (!intel_miptree_blit(brw,
src_irb->mt,
src_irb->mt_level, src_irb->mt_layer,
- srcX0, srcY0, src_rb->Name == 0,
+ srcX0, srcY0, readFb->FlipY,
dst_irb->mt,
dst_irb->mt_level, dst_irb->mt_layer,
- dstX0, dstY0, dst_rb->Name == 0,
- dstX1 - dstX0, dstY1 - dstY0, GL_COPY)) {
+ dstX0, dstY0, drawFb->FlipY,
+ dstX1 - dstX0, dstY1 - dstY0,
+ COLOR_LOGICOP_COPY)) {
perf_debug("glBlitFramebuffer(): unknown blit failure. "
"Falling back to software rendering.\n");
return mask;
GLbitfield mask, GLenum filter)
{
struct brw_context *brw = brw_context(ctx);
+ const struct gen_device_info *devinfo = &brw->screen->devinfo;
/* Page 679 of OpenGL 4.4 spec says:
* "Added BlitFramebuffer to commands affected by conditional rendering in
if (!_mesa_check_conditional_render(ctx))
return;
- if (brw->gen < 6) {
+ if (devinfo->gen < 6) {
/* On gen4-5, try BLT first.
*
* Gen4-5 have a single ring for both 3D and BLT operations, so there's
if (mask == 0x0)
return;
+ /* brw_blorp_framebuffer should always be successful for color blits. */
+ assert(!(mask & GL_COLOR_BUFFER_BIT));
+
mask = _mesa_meta_BlitFramebuffer(ctx, readFb, drawFb,
srcX0, srcY0, srcX1, srcY1,
dstX0, dstY0, dstX1, dstY1,
if (mask == 0x0)
return;
- if (brw->gen >= 8 && (mask & GL_STENCIL_BUFFER_BIT)) {
+ if (devinfo->gen >= 8 && (mask & GL_STENCIL_BUFFER_BIT)) {
assert(!"Invalid blit");
}
- /* Try using the BLT engine. */
- mask = intel_blit_framebuffer_with_blitter(ctx, readFb, drawFb,
- srcX0, srcY0, srcX1, srcY1,
- dstX0, dstY0, dstX1, dstY1,
- mask);
- if (mask == 0x0)
- return;
-
_swrast_BlitFramebuffer(ctx, readFb, drawFb,
srcX0, srcY0, srcX1, srcY1,
dstX0, dstY0, dstX1, dstY1,
struct intel_mipmap_tree *new_mt;
int width, height, depth;
- uint32_t layout_flags = MIPTREE_LAYOUT_ACCELERATED_UPLOAD |
- MIPTREE_LAYOUT_TILING_ANY;
-
intel_get_image_dims(rb->TexImage, &width, &height, &depth);
assert(irb->align_wa_mt == NULL);
intel_image->base.Base.TexFormat,
0, 0,
width, height, 1,
- irb->mt->num_samples,
- layout_flags);
+ irb->mt->surf.samples,
+ MIPTREE_CREATE_BUSY);
if (!invalidate)
intel_miptree_copy_slice(brw, intel_image->mt,
}
void
-brw_render_cache_set_clear(struct brw_context *brw)
+brw_cache_sets_clear(struct brw_context *brw)
{
- struct set_entry *entry;
-
- set_foreach(brw->render_cache, entry) {
- _mesa_set_remove(brw->render_cache, entry);
- }
-}
+ hash_table_foreach(brw->render_cache, render_entry)
+ _mesa_hash_table_remove(brw->render_cache, render_entry);
-void
-brw_render_cache_set_add_bo(struct brw_context *brw, struct brw_bo *bo)
-{
- _mesa_set_add(brw->render_cache, bo);
+ set_foreach(brw->depth_cache, depth_entry)
+ _mesa_set_remove(brw->depth_cache, depth_entry);
}
/**
* necessary is flushed before another use of that BO, but for reuse from
* different caches within a batchbuffer, it's all our responsibility.
*/
-void
-brw_render_cache_set_check_flush(struct brw_context *brw, struct brw_bo *bo)
+static void
+flush_depth_and_render_caches(struct brw_context *brw, struct brw_bo *bo)
{
- if (!_mesa_set_search(brw->render_cache, bo))
- return;
+ const struct gen_device_info *devinfo = &brw->screen->devinfo;
- if (brw->gen >= 6) {
+ if (devinfo->gen >= 6) {
brw_emit_pipe_control_flush(brw,
PIPE_CONTROL_DEPTH_CACHE_FLUSH |
PIPE_CONTROL_RENDER_TARGET_FLUSH |
brw_emit_mi_flush(brw);
}
- brw_render_cache_set_clear(brw);
+ brw_cache_sets_clear(brw);
+}
+
+void
+brw_cache_flush_for_read(struct brw_context *brw, struct brw_bo *bo)
+{
+ if (_mesa_hash_table_search(brw->render_cache, bo) ||
+ _mesa_set_search(brw->depth_cache, bo))
+ flush_depth_and_render_caches(brw, bo);
+}
+
+static void *
+format_aux_tuple(enum isl_format format, enum isl_aux_usage aux_usage)
+{
+ return (void *)(uintptr_t)((uint32_t)format << 8 | aux_usage);
+}
+
+void
+brw_cache_flush_for_render(struct brw_context *brw, struct brw_bo *bo,
+ enum isl_format format,
+ enum isl_aux_usage aux_usage)
+{
+ if (_mesa_set_search(brw->depth_cache, bo))
+ flush_depth_and_render_caches(brw, bo);
+
+ /* Check to see if this bo has been used by a previous rendering operation
+ * but with a different format or aux usage. If it has, flush the render
+ * cache so we ensure that it's only in there with one format or aux usage
+ * at a time.
+ *
+ * Even though it's not obvious, this can easily happen in practice.
+ * Suppose a client is blending on a surface with sRGB encode enabled on
+ * gen9. This implies that you get AUX_USAGE_CCS_D at best. If the client
+ * then disables sRGB decode and continues blending we will flip on
+ * AUX_USAGE_CCS_E without doing any sort of resolve in-between (this is
+ * perfectly valid since CCS_E is a subset of CCS_D). However, this means
+ * that we have fragments in-flight which are rendering with UNORM+CCS_E
+ * and other fragments in-flight with SRGB+CCS_D on the same surface at the
+ * same time and the pixel scoreboard and color blender are trying to sort
+ * it all out. This ends badly (i.e. GPU hangs).
+ *
+ * To date, we have never observed GPU hangs or even corruption to be
+ * associated with switching the format, only the aux usage. However,
+ * there are comments in various docs which indicate that the render cache
+ * isn't 100% resilient to format changes. We may as well be conservative
+ * and flush on format changes too. We can always relax this later if we
+ * find it to be a performance problem.
+ */
+ struct hash_entry *entry = _mesa_hash_table_search(brw->render_cache, bo);
+ if (entry && entry->data != format_aux_tuple(format, aux_usage))
+ flush_depth_and_render_caches(brw, bo);
+}
+
+void
+brw_render_cache_add_bo(struct brw_context *brw, struct brw_bo *bo,
+ enum isl_format format,
+ enum isl_aux_usage aux_usage)
+{
+#ifndef NDEBUG
+ struct hash_entry *entry = _mesa_hash_table_search(brw->render_cache, bo);
+ if (entry) {
+ /* Otherwise, someone didn't do a flush_for_render and that would be
+ * very bad indeed.
+ */
+ assert(entry->data == format_aux_tuple(format, aux_usage));
+ }
+#endif
+
+ _mesa_hash_table_insert(brw->render_cache, bo,
+ format_aux_tuple(format, aux_usage));
+}
+
+void
+brw_cache_flush_for_depth(struct brw_context *brw, struct brw_bo *bo)
+{
+ if (_mesa_hash_table_search(brw->render_cache, bo))
+ flush_depth_and_render_caches(brw, bo);
+}
+
+void
+brw_depth_cache_add_bo(struct brw_context *brw, struct brw_bo *bo)
+{
+ _mesa_set_add(brw->depth_cache, bo);
}
/**
dd->EGLImageTargetRenderbufferStorage =
intel_image_target_renderbuffer_storage;
- brw->render_cache = _mesa_set_create(brw, _mesa_hash_pointer,
- _mesa_key_pointer_equal);
+ brw->render_cache = _mesa_hash_table_create(brw, _mesa_hash_pointer,
+ _mesa_key_pointer_equal);
+ brw->depth_cache = _mesa_set_create(brw, _mesa_hash_pointer,
+ _mesa_key_pointer_equal);
}
projects / mesa.git / blobdiff