i965: map_gtt: check mapping address before adding offset

[mesa.git] / src / mesa / drivers / dri / i965 / intel_mipmap_tree.c

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index f1ac074fb506d1b87c73860de072265d3a563a76..e7ebc29b59d690235b64769589c53a4a8d03a9bd 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -979,21 +979,9 @@ intel_miptree_create_for_bo(struct brw_context *brw,
    mt->offset = offset;
    mt->tiling = tiling;
 
-   if (!(layout_flags & MIPTREE_LAYOUT_DISABLE_AUX)) {
+   if (!(layout_flags & MIPTREE_LAYOUT_DISABLE_AUX))
       intel_miptree_choose_aux_usage(brw, mt);
 
-      /* Since CCS_E can compress more than just clear color, we create the
-       * CCS for it up-front.  For CCS_D which only compresses clears, we
-       * create the CCS on-demand when a clear occurs that wants one.
-       */
-      if (mt->aux_usage == ISL_AUX_USAGE_CCS_E) {
-         if (!intel_miptree_alloc_ccs(brw, mt)) {
-            intel_miptree_release(&mt);
-            return NULL;
-         }
-      }
-   }
-
    return mt;
 }
 
@@ -1040,12 +1028,33 @@ miptree_create_for_planar_image(struct brw_context *brw,
 
 struct intel_mipmap_tree *
 intel_miptree_create_for_dri_image(struct brw_context *brw,
-                                   __DRIimage *image, GLenum target)
+                                   __DRIimage *image, GLenum target,
+                                   enum isl_colorspace colorspace,
+                                   bool is_winsys_image)
 {
-   if (image->planar_format && image->planar_format->nplanes > 0)
+   if (image->planar_format && image->planar_format->nplanes > 0) {
+      assert(colorspace == ISL_COLORSPACE_NONE ||
+             colorspace == ISL_COLORSPACE_YUV);
       return miptree_create_for_planar_image(brw, image, target);
+   }
 
    mesa_format format = image->format;
+   switch (colorspace) {
+   case ISL_COLORSPACE_NONE:
+      /* Keep the image format unmodified */
+      break;
+
+   case ISL_COLORSPACE_LINEAR:
+      format =_mesa_get_srgb_format_linear(format);
+      break;
+
+   case ISL_COLORSPACE_SRGB:
+      format =_mesa_get_linear_format_srgb(format);
+      break;
+
+   default:
+      unreachable("Inalid colorspace for non-planar image");
+   }
 
    if (!brw->ctx.TextureFormatSupported[format]) {
       /* The texture storage paths in core Mesa detect if the driver does not
@@ -1063,6 +1072,16 @@ intel_miptree_create_for_dri_image(struct brw_context *brw,
    if (!brw->ctx.TextureFormatSupported[format])
       return NULL;
 
+   /* If this image comes in from a window system, we have different
+    * requirements than if it comes in via an EGL import operation.  Window
+    * system images can use any form of auxiliary compression we wish because
+    * they get "flushed" before being handed off to the window system and we
+    * have the opportunity to do resolves.  Window system buffers also may be
+    * used for scanout so we need to flag that appropriately.
+    */
+   const uint32_t mt_layout_flags =
+      is_winsys_image ? MIPTREE_LAYOUT_FOR_SCANOUT : MIPTREE_LAYOUT_DISABLE_AUX;
+
    /* Disable creation of the texture's aux buffers because the driver exposes
     * no EGL API to manage them. That is, there is no API for resolving the aux
     * buffer's content to the main buffer nor for invalidating the aux buffer's
@@ -1071,8 +1090,7 @@ intel_miptree_create_for_dri_image(struct brw_context *brw,
    struct intel_mipmap_tree *mt =
       intel_miptree_create_for_bo(brw, image->bo, format,
                                   image->offset, image->width, image->height, 1,
-                                  image->pitch,
-                                  MIPTREE_LAYOUT_DISABLE_AUX);
+                                  image->pitch, mt_layout_flags);
    if (mt == NULL)
       return NULL;
 
@@ -1099,6 +1117,17 @@ intel_miptree_create_for_dri_image(struct brw_context *brw,
       }
    }
 
+   /* Since CCS_E can compress more than just clear color, we create the CCS
+    * for it up-front.  For CCS_D which only compresses clears, we create the
+    * CCS on-demand when a clear occurs that wants one.
+    */
+   if (mt->aux_usage == ISL_AUX_USAGE_CCS_E) {
+      if (!intel_miptree_alloc_ccs(brw, mt)) {
+         intel_miptree_release(&mt);
+         return NULL;
+      }
+   }
+
    return mt;
 }
 
@@ -2936,11 +2965,13 @@ intel_miptree_map_gtt(struct brw_context *brw,
    y /= bh;
    x /= bw;
 
-   base = intel_miptree_map_raw(brw, mt, map->mode) + mt->offset;
+   base = intel_miptree_map_raw(brw, mt, map->mode);
 
    if (base == NULL)
       map->ptr = NULL;
    else {
+      base += mt->offset;
+
       /* Note that in the case of cube maps, the caller must have passed the
        * slice number referencing the face.
       */