nir: Add a flag to lower_io to force "sample" interpolation
[mesa.git] / src / mesa / drivers / dri / i965 / intel_mipmap_tree.h
index 64f73ea9ae5b5315d8ccf0cbc3d86bbf9a2977c5..2f1b8ebf0e1e86e3d829dd5d21ee78605f6437cb 100644 (file)
@@ -47,6 +47,7 @@
 #include <assert.h>
 
 #include "main/mtypes.h"
+#include "isl/isl.h"
 #include "intel_bufmgr.h"
 #include "intel_resolve_map.h"
 #include <GL/internal/dri_interface.h>
@@ -613,6 +614,18 @@ struct intel_mipmap_tree
     */
    struct intel_mipmap_tree *stencil_mt;
 
+   /**
+    * \brief Stencil texturing miptree for sampling from a stencil texture
+    *
+    * Some hardware doesn't support sampling from the stencil texture as
+    * required by the GL_ARB_stencil_texturing extenion. To workaround this we
+    * blit the texture into a new texture that can be sampled.
+    *
+    * \see intel_update_r8stencil()
+    */
+   struct intel_mipmap_tree *r8stencil_mt;
+   bool r8stencil_needs_update;
+
    /**
     * \brief MCS miptree.
     *
@@ -624,6 +637,11 @@ struct intel_mipmap_tree
     */
    struct intel_mipmap_tree *mcs_mt;
 
+   /**
+    * Planes 1 and 2 in case this is a planar surface.
+    */
+   struct intel_mipmap_tree *plane[2];
+
    /**
     * Fast clear state for this buffer.
     */
@@ -657,18 +675,42 @@ struct intel_mipmap_tree
     */
    bool disable_aux_buffers;
 
+   /**
+    * Tells if the underlying buffer is to be also consumed by entities other
+    * than the driver. This allows logic to turn off features such as lossless
+    * compression which is not currently understood by client applications.
+    */
+   bool is_scanout;
+
    /* These are also refcounted:
     */
    GLuint refcount;
 };
 
 void
-intel_get_non_msrt_mcs_alignment(struct intel_mipmap_tree *mt,
+intel_get_non_msrt_mcs_alignment(const struct intel_mipmap_tree *mt,
                                  unsigned *width_px, unsigned *height);
 
+bool
+intel_miptree_is_lossless_compressed(const struct brw_context *brw,
+                                     const struct intel_mipmap_tree *mt);
+
+bool
+intel_tiling_supports_non_msrt_mcs(const struct brw_context *brw,
+                                   unsigned tiling);
+
+bool
+intel_miptree_supports_non_msrt_fast_clear(struct brw_context *brw,
+                                           const struct intel_mipmap_tree *mt);
+
+bool
+intel_miptree_supports_lossless_compressed(struct brw_context *brw,
+                                           const struct intel_mipmap_tree *mt);
+
 bool
 intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw,
-                                 struct intel_mipmap_tree *mt);
+                                 struct intel_mipmap_tree *mt,
+                                 bool is_lossless_compressed);
 
 enum {
    MIPTREE_LAYOUT_ACCELERATED_UPLOAD       = 1 << 0,
@@ -681,6 +723,8 @@ enum {
    MIPTREE_LAYOUT_TILING_NONE              = 1 << 6,
    MIPTREE_LAYOUT_TILING_ANY               = MIPTREE_LAYOUT_TILING_Y |
                                              MIPTREE_LAYOUT_TILING_NONE,
+
+   MIPTREE_LAYOUT_FOR_SCANOUT              = 1 << 7,
 };
 
 struct intel_mipmap_tree *intel_miptree_create(struct brw_context *brw,
@@ -762,13 +806,33 @@ intel_miptree_get_image_offset(const struct intel_mipmap_tree *mt,
                               GLuint level, GLuint slice,
                               GLuint *x, GLuint *y);
 
+enum isl_surf_dim
+get_isl_surf_dim(GLenum target);
+
+enum isl_dim_layout
+get_isl_dim_layout(const struct gen_device_info *devinfo, uint32_t tiling,
+                   GLenum target);
+
+void
+intel_miptree_get_isl_surf(struct brw_context *brw,
+                           const struct intel_mipmap_tree *mt,
+                           struct isl_surf *surf);
+void
+intel_miptree_get_aux_isl_surf(struct brw_context *brw,
+                               const struct intel_mipmap_tree *mt,
+                               struct isl_surf *surf,
+                               enum isl_aux_usage *usage);
+
+union isl_color_value
+intel_miptree_get_isl_clear_color(struct brw_context *brw,
+                                  const struct intel_mipmap_tree *mt);
+
 void
 intel_get_image_dims(struct gl_texture_image *image,
                      int *width, int *height, int *depth);
 
 void
 intel_get_tile_masks(uint32_t tiling, uint32_t tr_mode, uint32_t cpp,
-                     bool map_stencil_as_y_tiled,
                      uint32_t *mask_x, uint32_t *mask_y);
 
 void
@@ -884,9 +948,19 @@ intel_miptree_used_for_rendering(struct intel_mipmap_tree *mt)
       mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_UNRESOLVED;
 }
 
-void
+/**
+ * Flag values telling color resolve pass which special types of buffers
+ * can be ignored.
+ *
+ * INTEL_MIPTREE_IGNORE_CCS_E:   Lossless compressed (single-sample
+ *                               compression scheme since gen9)
+ */
+#define INTEL_MIPTREE_IGNORE_CCS_E (1 << 0)
+
+bool
 intel_miptree_resolve_color(struct brw_context *brw,
-                            struct intel_mipmap_tree *mt);
+                            struct intel_mipmap_tree *mt,
+                            int flags);
 
 void
 intel_miptree_make_shareable(struct brw_context *brw,
@@ -897,6 +971,10 @@ intel_miptree_updownsample(struct brw_context *brw,
                            struct intel_mipmap_tree *src,
                            struct intel_mipmap_tree *dst);
 
+void
+intel_update_r8stencil(struct brw_context *brw,
+                       struct intel_mipmap_tree *mt);
+
 /**
  * Horizontal distance from one slice to the next in the two-dimensional
  * miptree layout.
@@ -941,7 +1019,7 @@ intel_miptree_unmap(struct brw_context *brw,
 
 void
 intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
-              unsigned int level, unsigned int layer, enum gen6_hiz_op op);
+              unsigned int level, unsigned int layer, enum blorp_hiz_op op);
 
 #ifdef __cplusplus
 }