i965: Rename some PIPE_CONTROL flags
[mesa.git] / src / mesa / drivers / dri / i965 / intel_reg.h
index 8b630c5fc5479612efadfd767e27c3687c1c596e..e5730e2a4522043a788d88fa7697ff815d8ebdd9 100644 (file)
@@ -64,9 +64,9 @@
 #define PIPE_CONTROL_WRITE_DEPTH_COUNT (2 << 14)
 #define PIPE_CONTROL_WRITE_TIMESTAMP   (3 << 14)
 #define PIPE_CONTROL_DEPTH_STALL       (1 << 13)
-#define PIPE_CONTROL_WRITE_FLUSH       (1 << 12)
-#define PIPE_CONTROL_INSTRUCTION_FLUSH (1 << 11)
-#define PIPE_CONTROL_TC_FLUSH          (1 << 10) /* GM45+ only */
+#define PIPE_CONTROL_RENDER_TARGET_FLUSH (1 << 12)
+#define PIPE_CONTROL_INSTRUCTION_INVALIDATE (1 << 11)
+#define PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE  (1 << 10) /* GM45+ only */
 #define PIPE_CONTROL_ISP_DIS           (1 << 9)
 #define PIPE_CONTROL_INTERRUPT_ENABLE  (1 << 8)
 /* GT */
 #define CL_INVOCATION_COUNT             0x2338
 #define CL_PRIMITIVES_COUNT             0x2340
 #define PS_INVOCATION_COUNT             0x2348
+#define CS_INVOCATION_COUNT             0x2290
 #define PS_DEPTH_COUNT                  0x2350
 
 #define GEN6_SO_PRIM_STORAGE_NEEDED     0x2280