i965: Enable resource streamer for the batchbuffer

[mesa.git] / src / mesa / drivers / dri / i965 / intel_screen.h

diff --git a/src/mesa/drivers/dri/i965/intel_screen.h b/src/mesa/drivers/dri/i965/intel_screen.h
index 393315ea2921671c6367bed939c6408b24d742c8..a741c94e0ff5721bcb0537138ea87846cd3c4f2e 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_screen.h
+++ b/src/mesa/drivers/dri/i965/intel_screen.h
@@ -30,6 +30,9 @@
 
 #include <stdbool.h>
 #include <sys/time.h>
+
+#include <GL/internal/dri_interface.h>
+
 #include "dri_util.h"
 #include "intel_bufmgr.h"
 #include "brw_device_info.h"
@@ -49,6 +52,13 @@ struct intel_screen
 
    bool hw_has_swizzling;
 
+   bool hw_has_timestamp;
+
+   /**
+    * Does the kernel support resource streamer?
+    */
+   bool has_resource_streamer;
+
    /**
     * Does the kernel support context reset notifications?
     */
@@ -63,65 +73,26 @@ struct intel_screen
 
    int winsys_msaa_samples_override;
 
-   struct {
-      struct ra_regs *regs;
-
-      /**
-       * Array of the ra classes for the unaligned contiguous register
-       * block sizes used.
-       */
-      int *classes;
-
-      /**
-       * Mapping for register-allocated objects in *regs to the first
-       * GRF for that object.
-       */
-      uint8_t *ra_reg_to_grf;
-   } vec4_reg_set;
-
-   struct {
-      struct ra_regs *regs;
-
-      /**
-       * Array of the ra classes for the unaligned contiguous register
-       * block sizes used, indexed by register size.
-       */
-      int classes[16];
-
-      /**
-       * Mapping from classes to ra_reg ranges.  Each of the per-size
-       * classes corresponds to a range of ra_reg nodes.  This array stores
-       * those ranges in the form of first ra_reg in each class and the
-       * total number of ra_reg elements in the last array element.  This
-       * way the range of the i'th class is given by:
-       * [ class_to_ra_reg_range[i], class_to_ra_reg_range[i+1] )
-       */
-      int class_to_ra_reg_range[17];
-
-      /**
-       * Mapping for register-allocated objects in *regs to the first
-       * GRF for that object.
-       */
-      uint8_t *ra_reg_to_grf;
-
-      /**
-       * ra class for the aligned pairs we use for PLN, which doesn't
-       * appear in *classes.
-       */
-      int aligned_pairs_class;
-   } wm_reg_sets[2];
+   struct brw_compiler *compiler;
 
    /**
    * Configuration cache with default values for all contexts
    */
    driOptionCache optionCache;
-};
+
+   /**
+    * Version of the command parser reported by the
+    * I915_PARAM_CMD_PARSER_VERSION parameter
+    */
+   int cmd_parser_version;
+ };
 
 extern void intelDestroyContext(__DRIcontext * driContextPriv);
 
 extern GLboolean intelUnbindContext(__DRIcontext * driContextPriv);
 
 PUBLIC const __DRIextension **__driDriverGetExtensions_i965(void);
+extern const __DRI2fenceExtension intelFenceExtension;
 
 extern GLboolean
 intelMakeCurrent(__DRIcontext * driContextPriv,