i965: Push miptree tiling request into flags

[mesa.git] / src / mesa / drivers / dri / i965 / intel_tex_image.c

diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c
index 85d3d04ecb30616d49071d7fa5850dc252d4ff82..226aaeb4d542069b61d325e8e3d6ea342a77c54d 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -36,7 +36,7 @@ struct intel_mipmap_tree *
 intel_miptree_create_for_teximage(struct brw_context *brw,
                                  struct intel_texture_object *intelObj,
                                  struct intel_texture_image *intelImage,
-                                 bool expect_accelerated_upload)
+                                  uint32_t layout_flags)
 {
    GLuint lastLevel;
    int width, height, depth;
@@ -79,10 +79,8 @@ intel_miptree_create_for_teximage(struct brw_context *brw,
                               width,
                               height,
                               depth,
-                              expect_accelerated_upload,
                                intelImage->base.Base.NumSamples,
-                               INTEL_MIPTREE_TILING_ANY,
-                               false);
+                               layout_flags | MIPTREE_LAYOUT_ALLOC_ANY_TILED);
 }
 
 static void
@@ -155,7 +153,7 @@ intel_set_texture_image_bo(struct gl_context *ctx,
                            GLuint width, GLuint height,
                            GLuint pitch,
                            GLuint tile_x, GLuint tile_y,
-                           bool disable_aux_buffers)
+                           uint32_t layout_flags)
 {
    struct brw_context *brw = brw_context(ctx);
    struct intel_texture_image *intel_image = intel_texture_image(image);
@@ -171,7 +169,7 @@ intel_set_texture_image_bo(struct gl_context *ctx,
 
    intel_image->mt = intel_miptree_create_for_bo(brw, bo, image->TexFormat,
                                                  0, width, height, 1, pitch,
-                                                 disable_aux_buffers);
+                                                 layout_flags);
    if (intel_image->mt == NULL)
        return;
    intel_image->mt->target = target;
@@ -255,8 +253,7 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target,
                               rb->Base.Base.Width,
                               rb->Base.Base.Height,
                               rb->mt->pitch,
-                              0, 0,
-                              false /*disable_aux_buffers*/);
+                              0, 0, 0);
    _mesa_unlock_texture(&brw->ctx, texObj);
 }
 
@@ -349,7 +346,7 @@ intel_image_target_texture_2d(struct gl_context *ctx, GLenum target,
                               image->width,  image->height,
                               image->pitch,
                               image->tile_x, image->tile_y,
-                              true /*disable_aux_buffers*/);
+                              MIPTREE_LAYOUT_DISABLE_AUX);
 }
 
 /**
@@ -492,7 +489,7 @@ intel_get_tex_image(struct gl_context *ctx,
           * See the related comment in intelReadPixels() for a more detailed
           * explanation.
           */
-         intel_batchbuffer_emit_mi_flush(brw);
+         brw_emit_mi_flush(brw);
          return;
       }