i965/miptree: Switch to isl_surf::tiling

[mesa.git] / src / mesa / drivers / dri / i965 / intel_tex_image.c

diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c
index ba5d099fb40172f7d55681ab0787c7a475ef1291..494db68662ec0644f91586e819215825b821f64d 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -127,7 +127,7 @@ intel_miptree_create_for_teximage(struct brw_context *brw,
                               width,
                               height,
                               depth,
-                               intelImage->base.Base.NumSamples,
+                               MAX2(intelImage->base.Base.NumSamples, 1),
                                layout_flags | MIPTREE_LAYOUT_TILING_ANY);
 }
 
@@ -268,8 +268,6 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target,
    if (mt == NULL)
        return;
    mt->target = target;
-   mt->total_width = rb->Base.Base.Width;
-   mt->total_height = rb->Base.Base.Height;
 
    _mesa_lock_texture(&brw->ctx, texObj);
    texImage = _mesa_get_tex_image(ctx, texObj, target, 0);
@@ -435,8 +433,8 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx,
       return false;
 
    if (!image->mt ||
-       (image->mt->tiling != I915_TILING_X &&
-       image->mt->tiling != I915_TILING_Y)) {
+       (image->mt->surf.tiling != ISL_TILING_X &&
+        image->mt->surf.tiling != ISL_TILING_Y0)) {
       /* The algorithm is written only for X- or Y-tiled memory. */
       return false;
    }
@@ -479,7 +477,7 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx,
        "mesa_format=0x%x tiling=%d "
        "packing=(alignment=%d row_length=%d skip_pixels=%d skip_rows=%d)\n",
        __func__, texImage->Level, xoffset, yoffset, width, height,
-       format, type, texImage->TexFormat, image->mt->tiling,
+       format, type, texImage->TexFormat, image->mt->surf.tiling,
        packing->Alignment, packing->RowLength, packing->SkipPixels,
        packing->SkipRows);
 
@@ -496,7 +494,7 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx,
       map,
       dst_pitch, image->mt->pitch,
       brw->has_swizzling,
-      image->mt->tiling,
+      image->mt->surf.tiling,
       mem_copy
    );