i965/gen9: Optimize slice and subslice load balancing behavior.

[mesa.git] / src / mesa / drivers / dri / i965 / intel_tex_image.c

diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c
index e25bc9a0c08d43ec43b746c5441b9bc7f6885497..ccaa9ef7474714c10bd84ac345eea1d55ac7c11f 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -14,6 +14,7 @@
 #include "main/texobj.h"
 #include "main/teximage.h"
 #include "main/texstore.h"
+#include "main/glthread.h"
 
 #include "drivers/common/meta.h"
 
@@ -21,10 +22,8 @@
 #include "intel_buffer_objects.h"
 #include "intel_batchbuffer.h"
 #include "intel_tex.h"
-#include "intel_blit.h"
 #include "intel_fbo.h"
 #include "intel_image.h"
-#include "intel_tiled_memcpy.h"
 #include "brw_context.h"
 #include "brw_blorp.h"
 
@@ -193,7 +192,7 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
    struct brw_bo *bo;
 
    uint32_t cpp;
-   mem_copy_fn mem_copy = NULL;
+   isl_memcpy_type copy_type;
 
    /* This fastpath is restricted to specific texture types:
     * a 2D BGRA, RGBA, L8 or A8 texture. It could be generalized to support
@@ -223,7 +222,9 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
    if (ctx->_ImageTransferState)
       return false;
 
-   if (!intel_get_memcpy(texImage->TexFormat, format, type, &mem_copy, &cpp))
+   copy_type = intel_miptree_get_memcpy_type(texImage->TexFormat, format, type,
+                                             &cpp);
+   if (copy_type == ISL_MEMCPY_INVALID)
       return false;
 
    /* If this is a nontrivial texture view, let another path handle it instead. */
@@ -290,15 +291,15 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
    xoffset += level_x;
    yoffset += level_y;
 
-   linear_to_tiled(
+   isl_memcpy_linear_to_tiled(
       xoffset * cpp, (xoffset + width) * cpp,
       yoffset, yoffset + height,
       map,
       pixels,
-      image->mt->surf.row_pitch, src_pitch,
+      image->mt->surf.row_pitch_B, src_pitch,
       brw->has_swizzling,
       image->mt->surf.tiling,
-      mem_copy
+      copy_type
    );
 
    brw_bo_unmap(bo);
@@ -326,9 +327,6 @@ intel_upload_tex(struct gl_context * ctx,
 
    bool tex_busy = mt && brw_bo_busy(mt->bo);
 
-   if (mt && mt->format == MESA_FORMAT_S_UINT8)
-      mt->r8stencil_needs_update = true;
-
    if (_mesa_is_bufferobj(packing->BufferObj) || tex_busy ||
        mt->aux_usage == ISL_AUX_USAGE_CCS_E) {
       ok = intel_texsubimage_blorp(brw, dims, texImage,
@@ -421,8 +419,8 @@ intel_set_texture_image_mt(struct brw_context *brw,
    brw->ctx.Driver.FreeTextureImageBuffer(&brw->ctx, image);
 
    intel_texobj->needs_validate = true;
-   intel_image->base.RowStride = mt->surf.row_pitch / mt->cpp;
-   assert(mt->surf.row_pitch % mt->cpp == 0);
+   intel_image->base.RowStride = mt->surf.row_pitch_B / mt->cpp;
+   assert(mt->surf.row_pitch_B % mt->cpp == 0);
 
    intel_miptree_reference(&intel_image->mt, mt);
 
@@ -445,6 +443,8 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target,
    mesa_format texFormat = MESA_FORMAT_NONE;
    GLenum internal_format = 0;
 
+   _mesa_glthread_finish(ctx);
+
    texObj = _mesa_get_current_tex_object(ctx, target);
 
    if (!texObj)
@@ -543,7 +543,7 @@ intelReleaseTexBuffer(__DRIcontext *pDRICtx, GLint target,
     * should be a no-op in almost all cases.  On the off chance that someone
     * ever triggers this, we should at least warn them.
     */
-   if (intel_tex->mt->mcs_buf &&
+   if (intel_tex->mt->aux_buf &&
        intel_miptree_get_aux_state(intel_tex->mt, 0, 0) !=
        isl_drm_modifier_get_default_aux_state(intel_tex->mt->drm_modifier)) {
       _mesa_warning(ctx, "Aux state changed between BindTexImage and "
@@ -617,16 +617,6 @@ intel_image_target_texture_2d(struct gl_context *ctx, GLenum target,
    if (image == NULL)
       return;
 
-   /* We support external textures only for EGLImages created with
-    * EGL_EXT_image_dma_buf_import. We may lift that restriction in the future.
-    */
-   if (target == GL_TEXTURE_EXTERNAL_OES && !image->dma_buf_imported) {
-      _mesa_error(ctx, GL_INVALID_OPERATION,
-            "glEGLImageTargetTexture2DOES(external target is enabled only "
-               "for images created with EGL_EXT_image_dma_buf_import");
-      return;
-   }
-
    /* Disallow depth/stencil textures: we don't have a way to pass the
     * separate stencil miptree of a GL_DEPTH_STENCIL texture through.
     */
@@ -698,7 +688,7 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx,
    struct brw_bo *bo;
 
    uint32_t cpp;
-   mem_copy_fn mem_copy = NULL;
+   isl_memcpy_type copy_type;
 
    /* This fastpath is restricted to specific texture types:
     * a 2D BGRA, RGBA, L8 or A8 texture. It could be generalized to support
@@ -732,7 +722,9 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx,
    if (texImage->_BaseFormat == GL_RGB)
       return false;
 
-   if (!intel_get_memcpy(texImage->TexFormat, format, type, &mem_copy, &cpp))
+   copy_type = intel_miptree_get_memcpy_type(texImage->TexFormat, format, type,
+                                             &cpp);
+   if (copy_type == ISL_MEMCPY_INVALID)
       return false;
 
    /* If this is a nontrivial texture view, let another path handle it instead. */
@@ -796,15 +788,15 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx,
    xoffset += level_x;
    yoffset += level_y;
 
-   tiled_to_linear(
+   isl_memcpy_tiled_to_linear(
       xoffset * cpp, (xoffset + width) * cpp,
       yoffset, yoffset + height,
       pixels,
       map,
-      dst_pitch, image->mt->surf.row_pitch,
+      dst_pitch, image->mt->surf.row_pitch_B,
       brw->has_swizzling,
       image->mt->surf.tiling,
-      mem_copy
+      copy_type
    );
 
    brw_bo_unmap(bo);
@@ -927,7 +919,7 @@ intelCompressedTexSubImage(struct gl_context *ctx, GLuint dims,
                         !_mesa_is_srgb_format(gl_format);
    struct brw_context *brw = (struct brw_context*) ctx;
    const struct gen_device_info *devinfo = &brw->screen->devinfo;
-   if (devinfo->gen == 9 && is_linear_astc)
+   if (devinfo->gen == 9 && !gen_device_info_is_9lp(devinfo) && is_linear_astc)
       flush_astc_denorms(ctx, dims, texImage,
                          xoffset, yoffset, zoffset,
                          width, height, depth);