i965: Port gen7+ 3DSTATE_SOL to genxml.

[mesa.git] / src / mesa / drivers / dri / i965 / intel_tex_subimage.c

diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
index 2a2298a8dee41c4fc6ae878b1259d18525539f12..912622253a4ccae70a0236e373e2e6f1d29a428e 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_tex_subimage.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
@@ -84,7 +84,7 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
    int src_pitch;
 
    /* The miptree's buffer. */
-   drm_bacon_bo *bo;
+   struct brw_bo *bo;
 
    int error = 0;
 
@@ -148,7 +148,7 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
       intel_batchbuffer_flush(brw);
    }
 
-   error = brw_bo_map(brw, bo, true /* write enable */, "miptree");
+   error = brw_bo_map(brw, bo, true /* write enable */);
    if (error || bo->virtual == NULL) {
       DBG("%s: failed to map bo\n", __func__);
       return false;
@@ -185,7 +185,7 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
       mem_copy
    );
 
-   drm_bacon_bo_unmap(bo);
+   brw_bo_unmap(bo);
    return true;
 }
 
@@ -202,7 +202,7 @@ intelTexSubImage(struct gl_context * ctx,
    struct intel_mipmap_tree *mt = intel_texture_image(texImage)->mt;
    bool ok;
 
-   bool tex_busy = mt && drm_bacon_bo_busy(mt->bo);
+   bool tex_busy = mt && brw_bo_busy(mt->bo);
 
    if (mt && mt->format == MESA_FORMAT_S_UINT8)
       mt->r8stencil_needs_update = true;