i965: Be a bit more conservative about certain resolves

[mesa.git] / src / mesa / drivers / dri / i965 / intel_tex_subimage.c

diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
index e9c7b802b11a0839927a8d558104cfccac764e5e..caa673001fde0943cc19340c38d0ac2089ab1c4b 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_tex_subimage.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
@@ -145,10 +145,13 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
    if (brw->gen < 5 && brw->has_swizzling)
       return false;
 
+   int level = texImage->Level + texImage->TexObject->MinLevel;
+
    /* Since we are going to write raw data to the miptree, we need to resolve
     * any pending fast color clears before we start.
     */
-   intel_miptree_all_slices_resolve_color(brw, image->mt, 0);
+   assert(image->mt->logical_depth0 == 1);
+   intel_miptree_resolve_color(brw, image->mt, level, 1, 0, 1, 0);
 
    bo = image->mt->bo;
 
@@ -177,8 +180,6 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
        packing->Alignment, packing->RowLength, packing->SkipPixels,
        packing->SkipRows, for_glTexImage);
 
-   int level = texImage->Level + texImage->TexObject->MinLevel;
-
    /* Adjust x and y offset based on miplevel */
    xoffset += image->mt->level[level].level_x;
    yoffset += image->mt->level[level].level_y;