i965/miptree: Replace is_lossless_compressed with mt->aux_usage checks

[mesa.git] / src / mesa / drivers / dri / i965 / intel_tiled_memcpy.c

diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
index b61a842b9cc32dcfe0b7c5b474850cea00f1c699..c888e466eb7254bc26da534c352f6b5705c7191c 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
+++ b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
@@ -64,6 +64,19 @@ ror(uint32_t n, uint32_t d)
    return (n >> d) | (n << (32 - d));
 }
 
+static inline uint32_t
+bswap32(uint32_t n)
+{
+#if defined(HAVE___BUILTIN_BSWAP32)
+   return __builtin_bswap32(n);
+#else
+   return (n >> 24) |
+          ((n >> 8) & 0x0000ff00) |
+          ((n << 8) & 0x00ff0000) |
+          (n << 24);
+#endif
+}
+
 /**
  * Copy RGBA to BGRA - swap R and B.
  */
@@ -76,7 +89,7 @@ rgba8_copy(void *dst, const void *src, size_t bytes)
    assert(bytes % 4 == 0);
 
    while (bytes >= 4) {
-      *d = ror(__builtin_bswap32(*s), 8);
+      *d = ror(bswap32(*s), 8);
       d += 1;
       s += 1;
       bytes -= 4;
@@ -180,10 +193,10 @@ rgba8_copy_aligned_src(void *dst, const void *src, size_t bytes)
 
 #if defined(__SSSE3__) || defined(__SSE2__)
    if (bytes == 64) {
-      rgba8_copy_16_aligned_dst(dst +  0, src +  0);
-      rgba8_copy_16_aligned_dst(dst + 16, src + 16);
-      rgba8_copy_16_aligned_dst(dst + 32, src + 32);
-      rgba8_copy_16_aligned_dst(dst + 48, src + 48);
+      rgba8_copy_16_aligned_src(dst +  0, src +  0);
+      rgba8_copy_16_aligned_src(dst + 16, src + 16);
+      rgba8_copy_16_aligned_src(dst + 32, src + 32);
+      rgba8_copy_16_aligned_src(dst + 48, src + 48);
       return dst;
    }