#include <stdlib.h>
#include <stdio.h>
#include <stdbool.h>
-#include "glsl/ralloc.h"
+#include "util/ralloc.h"
#include "brw_context.h"
#include "brw_eu.h"
static bool
-test_compact_instruction(struct brw_compile *p, struct brw_instruction src)
+test_compact_instruction(struct brw_codegen *p, brw_inst src)
{
- struct brw_context *brw = p->brw;
- struct intel_context *intel = &brw->intel;
-
- struct brw_compact_instruction dst;
+ brw_compact_inst dst;
memset(&dst, 0xd0, sizeof(dst));
- if (brw_try_compact_instruction(p, &dst, &src)) {
- struct brw_instruction uncompacted;
+ if (brw_try_compact_instruction(p->devinfo, &dst, &src)) {
+ brw_inst uncompacted;
- brw_uncompact_instruction(intel, &uncompacted, &dst);
+ brw_uncompact_instruction(p->devinfo, &uncompacted, &dst);
if (memcmp(&uncompacted, &src, sizeof(src))) {
- brw_debug_compact_uncompact(intel, &src, &uncompacted);
+ brw_debug_compact_uncompact(p->devinfo, &src, &uncompacted);
return false;
}
} else {
- struct brw_compact_instruction unchanged;
+ brw_compact_inst unchanged;
memset(&unchanged, 0xd0, sizeof(unchanged));
/* It's not supposed to change dst unless it compacted. */
if (memcmp(&unchanged, &dst, sizeof(dst))) {
fprintf(stderr, "Failed to compact, but dst changed\n");
fprintf(stderr, " Instruction: ");
- brw_disasm(stderr, &src, intel->gen);
+ brw_disassemble_inst(stderr, p->devinfo, &src, false);
return false;
}
}
* become meaningless once fuzzing twiddles a related bit.
*/
static void
-clear_pad_bits(struct brw_instruction *inst)
+clear_pad_bits(const struct brw_device_info *devinfo, brw_inst *inst)
{
- if (inst->header.opcode != BRW_OPCODE_SEND &&
- inst->header.opcode != BRW_OPCODE_SENDC &&
- inst->header.opcode != BRW_OPCODE_BREAK &&
- inst->header.opcode != BRW_OPCODE_CONTINUE &&
- inst->bits1.da1.src0_reg_file != BRW_IMMEDIATE_VALUE &&
- inst->bits1.da1.src1_reg_file != BRW_IMMEDIATE_VALUE) {
- if (inst->bits3.da1.src1_address_mode)
- inst->bits3.ia1.pad1 = 0;
- else
- inst->bits3.da1.pad0 = 0;
+ if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND &&
+ brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC &&
+ brw_inst_opcode(devinfo, inst) != BRW_OPCODE_BREAK &&
+ brw_inst_opcode(devinfo, inst) != BRW_OPCODE_CONTINUE &&
+ brw_inst_src0_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE &&
+ brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) {
+ brw_inst_set_bits(inst, 127, 111, 0);
}
}
static bool
-skip_bit(struct brw_instruction *src, int bit)
+skip_bit(const struct brw_device_info *devinfo, brw_inst *src, int bit)
{
/* pad bit */
if (bit == 7)
return true;
/* sometimes these are pad bits. */
- if (src->header.opcode != BRW_OPCODE_SEND &&
- src->header.opcode != BRW_OPCODE_SENDC &&
- src->header.opcode != BRW_OPCODE_BREAK &&
- src->header.opcode != BRW_OPCODE_CONTINUE &&
- src->bits1.da1.src0_reg_file != BRW_IMMEDIATE_VALUE &&
- src->bits1.da1.src1_reg_file != BRW_IMMEDIATE_VALUE &&
+ if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND &&
+ brw_inst_opcode(devinfo, src) != BRW_OPCODE_SENDC &&
+ brw_inst_opcode(devinfo, src) != BRW_OPCODE_BREAK &&
+ brw_inst_opcode(devinfo, src) != BRW_OPCODE_CONTINUE &&
+ brw_inst_src0_reg_file(devinfo, src) != BRW_IMMEDIATE_VALUE &&
+ brw_inst_src1_reg_file(devinfo, src) != BRW_IMMEDIATE_VALUE &&
bit >= 121) {
return true;
}
}
static bool
-test_fuzz_compact_instruction(struct brw_compile *p,
- struct brw_instruction src)
+test_fuzz_compact_instruction(struct brw_codegen *p, brw_inst src)
{
for (int bit0 = 0; bit0 < 128; bit0++) {
- if (skip_bit(&src, bit0))
+ if (skip_bit(p->devinfo, &src, bit0))
continue;
for (int bit1 = 0; bit1 < 128; bit1++) {
- struct brw_instruction instr = src;
+ brw_inst instr = src;
uint32_t *bits = (uint32_t *)&instr;
- if (skip_bit(&src, bit1))
+ if (skip_bit(p->devinfo, &src, bit1))
continue;
bits[bit0 / 32] ^= (1 << (bit0 & 31));
bits[bit1 / 32] ^= (1 << (bit1 & 31));
- clear_pad_bits(&instr);
+ clear_pad_bits(p->devinfo, &instr);
if (!test_compact_instruction(p, instr)) {
printf(" twiddled bits for fuzzing %d, %d\n", bit0, bit1);
}
static void
-gen_ADD_GRF_GRF_GRF(struct brw_compile *p)
+gen_ADD_GRF_GRF_GRF(struct brw_codegen *p)
{
struct brw_reg g0 = brw_vec8_grf(0, 0);
struct brw_reg g2 = brw_vec8_grf(2, 0);
}
static void
-gen_ADD_GRF_GRF_IMM(struct brw_compile *p)
+gen_ADD_GRF_GRF_IMM(struct brw_codegen *p)
{
struct brw_reg g0 = brw_vec8_grf(0, 0);
struct brw_reg g2 = brw_vec8_grf(2, 0);
}
static void
-gen_ADD_GRF_GRF_IMM_d(struct brw_compile *p)
+gen_ADD_GRF_GRF_IMM_d(struct brw_codegen *p)
{
struct brw_reg g0 = retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_D);
struct brw_reg g2 = retype(brw_vec8_grf(2, 0), BRW_REGISTER_TYPE_D);
}
static void
-gen_MOV_GRF_GRF(struct brw_compile *p)
+gen_MOV_GRF_GRF(struct brw_codegen *p)
{
struct brw_reg g0 = brw_vec8_grf(0, 0);
struct brw_reg g2 = brw_vec8_grf(2, 0);
}
static void
-gen_ADD_MRF_GRF_GRF(struct brw_compile *p)
+gen_ADD_MRF_GRF_GRF(struct brw_codegen *p)
{
struct brw_reg m6 = brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, 6, 0);
struct brw_reg g2 = brw_vec8_grf(2, 0);
}
static void
-gen_ADD_vec1_GRF_GRF_GRF(struct brw_compile *p)
+gen_ADD_vec1_GRF_GRF_GRF(struct brw_codegen *p)
{
struct brw_reg g0 = brw_vec1_grf(0, 0);
struct brw_reg g2 = brw_vec1_grf(2, 0);
}
static void
-gen_PLN_MRF_GRF_GRF(struct brw_compile *p)
+gen_PLN_MRF_GRF_GRF(struct brw_codegen *p)
{
struct brw_reg m6 = brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, 6, 0);
struct brw_reg interp = brw_vec1_grf(2, 0);
}
static void
-gen_f0_MOV_GRF_GRF(struct brw_compile *p)
+gen_f0_0_MOV_GRF_GRF(struct brw_codegen *p)
{
struct brw_reg g0 = brw_vec8_grf(0, 0);
struct brw_reg g2 = brw_vec8_grf(2, 0);
brw_push_insn_state(p);
- brw_set_predicate_control(p, true);
+ brw_set_default_predicate_control(p, true);
brw_MOV(p, g0, g2);
brw_pop_insn_state(p);
}
-/* The handling of f1 vs f0 changes between gen6 and gen7. Explicitly test
+/* The handling of f0.1 vs f0.0 changes between gen6 and gen7. Explicitly test
* it, so that we run the fuzzing can run over all the other bits that might
* interact with it.
*/
static void
-gen_f1_MOV_GRF_GRF(struct brw_compile *p)
+gen_f0_1_MOV_GRF_GRF(struct brw_codegen *p)
{
struct brw_reg g0 = brw_vec8_grf(0, 0);
struct brw_reg g2 = brw_vec8_grf(2, 0);
brw_push_insn_state(p);
- brw_set_predicate_control(p, true);
- current_insn(p)->bits2.da1.flag_reg_nr = 1;
- brw_MOV(p, g0, g2);
+ brw_set_default_predicate_control(p, true);
+ brw_inst *mov = brw_MOV(p, g0, g2);
+ brw_inst_set_flag_subreg_nr(p->devinfo, mov, 1);
brw_pop_insn_state(p);
}
struct {
- void (*func)(struct brw_compile *p);
+ void (*func)(struct brw_codegen *p);
} tests[] = {
{ gen_MOV_GRF_GRF },
{ gen_ADD_GRF_GRF_GRF },
{ gen_ADD_MRF_GRF_GRF },
{ gen_ADD_vec1_GRF_GRF_GRF },
{ gen_PLN_MRF_GRF_GRF },
- { gen_f0_MOV_GRF_GRF },
- { gen_f1_MOV_GRF_GRF },
+ { gen_f0_0_MOV_GRF_GRF },
+ { gen_f0_1_MOV_GRF_GRF },
};
static bool
-run_tests(struct brw_context *brw)
+run_tests(const struct brw_device_info *devinfo)
{
bool fail = false;
for (int i = 0; i < ARRAY_SIZE(tests); i++) {
for (int align_16 = 0; align_16 <= 1; align_16++) {
- struct brw_compile *p = rzalloc(NULL, struct brw_compile);
- brw_init_compile(brw, p, p);
+ struct brw_codegen *p = rzalloc(NULL, struct brw_codegen);
+ brw_init_codegen(devinfo, p, p);
- brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+ brw_set_default_predicate_control(p, BRW_PREDICATE_NONE);
if (align_16)
- brw_set_access_mode(p, BRW_ALIGN_16);
+ brw_set_default_access_mode(p, BRW_ALIGN_16);
else
- brw_set_access_mode(p, BRW_ALIGN_1);
+ brw_set_default_access_mode(p, BRW_ALIGN_1);
tests[i].func(p);
assert(p->nr_insn == 1);
int
main(int argc, char **argv)
{
- struct brw_context *brw = calloc(1, sizeof(*brw));
- struct intel_context *intel = &brw->intel;
- intel->gen = 6;
+ struct brw_device_info *devinfo = calloc(1, sizeof(*devinfo));
+ devinfo->gen = 6;
bool fail = false;
- for (intel->gen = 6; intel->gen <= 7; intel->gen++) {
- fail |= run_tests(brw);
+ for (devinfo->gen = 6; devinfo->gen <= 7; devinfo->gen++) {
+ fail |= run_tests(devinfo);
}
return fail;