intel: Add a batch flush between front-buffer downsample and X protocol.

[mesa.git] / src / mesa / drivers / dri / i965 / test_eu_compact.c

diff --git a/src/mesa/drivers/dri/i965/test_eu_compact.c b/src/mesa/drivers/dri/i965/test_eu_compact.c
index e9d43015ea3dca14ea2d7f1578c55c37e9a0af7d..cc0c6e46812c3104de5ce696f118e30281c37f93 100644 (file)
--- a/src/mesa/drivers/dri/i965/test_eu_compact.c
+++ b/src/mesa/drivers/dri/i965/test_eu_compact.c
@@ -32,7 +32,6 @@ static bool
 test_compact_instruction(struct brw_compile *p, struct brw_instruction src)
 {
    struct brw_context *brw = p->brw;
-   struct intel_context *intel = &brw->intel;
 
    struct brw_compact_instruction dst;
    memset(&dst, 0xd0, sizeof(dst));
@@ -40,9 +39,9 @@ test_compact_instruction(struct brw_compile *p, struct brw_instruction src)
    if (brw_try_compact_instruction(p, &dst, &src)) {
       struct brw_instruction uncompacted;
 
-      brw_uncompact_instruction(intel, &uncompacted, &dst);
+      brw_uncompact_instruction(brw, &uncompacted, &dst);
       if (memcmp(&uncompacted, &src, sizeof(src))) {
-        brw_debug_compact_uncompact(intel, &src, &uncompacted);
+        brw_debug_compact_uncompact(brw, &src, &uncompacted);
         return false;
       }
    } else {
@@ -52,7 +51,7 @@ test_compact_instruction(struct brw_compile *p, struct brw_instruction src)
       if (memcmp(&unchanged, &dst, sizeof(dst))) {
         fprintf(stderr, "Failed to compact, but dst changed\n");
         fprintf(stderr, "  Instruction: ");
-        brw_disasm(stderr, &src, intel->gen);
+        brw_disasm(stderr, &src, brw->gen);
         return false;
       }
    }
@@ -214,7 +213,7 @@ gen_PLN_MRF_GRF_GRF(struct brw_compile *p)
 }
 
 static void
-gen_f0_MOV_GRF_GRF(struct brw_compile *p)
+gen_f0_0_MOV_GRF_GRF(struct brw_compile *p)
 {
    struct brw_reg g0 = brw_vec8_grf(0, 0);
    struct brw_reg g2 = brw_vec8_grf(2, 0);
@@ -225,19 +224,19 @@ gen_f0_MOV_GRF_GRF(struct brw_compile *p)
    brw_pop_insn_state(p);
 }
 
-/* The handling of f1 vs f0 changes between gen6 and gen7.  Explicitly test
+/* The handling of f0.1 vs f0.0 changes between gen6 and gen7.  Explicitly test
  * it, so that we run the fuzzing can run over all the other bits that might
  * interact with it.
  */
 static void
-gen_f1_MOV_GRF_GRF(struct brw_compile *p)
+gen_f0_1_MOV_GRF_GRF(struct brw_compile *p)
 {
    struct brw_reg g0 = brw_vec8_grf(0, 0);
    struct brw_reg g2 = brw_vec8_grf(2, 0);
 
    brw_push_insn_state(p);
    brw_set_predicate_control(p, true);
-   current_insn(p)->bits2.da1.flag_reg_nr = 1;
+   current_insn(p)->bits2.da1.flag_subreg_nr = 1;
    brw_MOV(p, g0, g2);
    brw_pop_insn_state(p);
 }
@@ -252,17 +251,14 @@ struct {
    { gen_ADD_MRF_GRF_GRF },
    { gen_ADD_vec1_GRF_GRF_GRF },
    { gen_PLN_MRF_GRF_GRF },
-   { gen_f0_MOV_GRF_GRF },
-   { gen_f1_MOV_GRF_GRF },
+   { gen_f0_0_MOV_GRF_GRF },
+   { gen_f0_1_MOV_GRF_GRF },
 };
 
-int
-main(int argc, char **argv)
+static bool
+run_tests(struct brw_context *brw)
 {
-   struct brw_context *brw = calloc(1, sizeof(*brw));
-   struct intel_context *intel = &brw->intel;
-   intel->gen = 6;
-   int ret = 0;
+   bool fail = false;
 
    for (int i = 0; i < ARRAY_SIZE(tests); i++) {
       for (int align_16 = 0; align_16 <= 1; align_16++) {
@@ -279,12 +275,12 @@ main(int argc, char **argv)
         assert(p->nr_insn == 1);
 
         if (!test_compact_instruction(p, p->store[0])) {
-           ret = 1;
+           fail = true;
            continue;
         }
 
         if (!test_fuzz_compact_instruction(p, p->store[0])) {
-           ret = 1;
+           fail = true;
            continue;
         }
 
@@ -292,5 +288,19 @@ main(int argc, char **argv)
       }
    }
 
-   return ret;
+   return fail;
+}
+
+int
+main(int argc, char **argv)
+{
+   struct brw_context *brw = calloc(1, sizeof(*brw));
+   brw->gen = 6;
+   bool fail = false;
+
+   for (brw->gen = 6; brw->gen <= 7; brw->gen++) {
+      fail |= run_tests(brw);
+   }
+
+   return fail;
 }