i965/vec4: Assign correct destination offset to rewritten instruction in register...
[mesa.git] / src / mesa / drivers / dri / i965 / test_fs_saturate_propagation.cpp
index 30c14724ff0f1ab2a7bc70bff0c2d89149ab011b..680fe72dfd5c98f32a9d4ffa6170d0d9f55e1a8a 100644 (file)
@@ -33,11 +33,10 @@ class saturate_propagation_test : public ::testing::Test {
 
 public:
    struct brw_compiler *compiler;
-   struct brw_device_info *devinfo;
+   struct gen_device_info *devinfo;
    struct gl_context *ctx;
    struct brw_wm_prog_data *prog_data;
    struct gl_shader_program *shader_prog;
-   struct brw_fragment_program *fp;
    fs_visitor *v;
 };
 
@@ -57,17 +56,14 @@ void saturate_propagation_test::SetUp()
 {
    ctx = (struct gl_context *)calloc(1, sizeof(*ctx));
    compiler = (struct brw_compiler *)calloc(1, sizeof(*compiler));
-   devinfo = (struct brw_device_info *)calloc(1, sizeof(*devinfo));
+   devinfo = (struct gen_device_info *)calloc(1, sizeof(*devinfo));
    compiler->devinfo = devinfo;
 
-   fp = ralloc(NULL, struct brw_fragment_program);
    prog_data = ralloc(NULL, struct brw_wm_prog_data);
    nir_shader *shader = nir_shader_create(NULL, MESA_SHADER_FRAGMENT, NULL);
 
    v = new saturate_propagation_fs_visitor(compiler, prog_data, shader);
 
-   _mesa_init_gl_program(&fp->program.Base, GL_FRAGMENT_SHADER, 0);
-
    devinfo->gen = 4;
 }
 
@@ -215,14 +211,13 @@ TEST_F(saturate_propagation_test, neg_mov_sat)
    fs_reg dst0 = v->vgrf(glsl_type::float_type);
    fs_reg dst1 = v->vgrf(glsl_type::float_type);
    fs_reg src0 = v->vgrf(glsl_type::float_type);
-   fs_reg src1 = v->vgrf(glsl_type::float_type);
-   bld.ADD(dst0, src0, src1);
+   bld.RNDU(dst0, src0);
    dst0.negate = true;
    set_saturate(true, bld.MOV(dst1, dst0));
 
    /* = Before =
     *
-    * 0: add(8)        dst0  src0  src1
+    * 0: rndu(8)       dst0  src0
     * 1: mov.sat(8)    dst1  -dst0
     *
     * = After =
@@ -238,12 +233,50 @@ TEST_F(saturate_propagation_test, neg_mov_sat)
    EXPECT_FALSE(saturate_propagation(v));
    EXPECT_EQ(0, block0->start_ip);
    EXPECT_EQ(1, block0->end_ip);
-   EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
+   EXPECT_EQ(BRW_OPCODE_RNDU, instruction(block0, 0)->opcode);
    EXPECT_FALSE(instruction(block0, 0)->saturate);
    EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode);
    EXPECT_TRUE(instruction(block0, 1)->saturate);
 }
 
+TEST_F(saturate_propagation_test, add_neg_mov_sat)
+{
+   const fs_builder &bld = v->bld;
+   fs_reg dst0 = v->vgrf(glsl_type::float_type);
+   fs_reg dst1 = v->vgrf(glsl_type::float_type);
+   fs_reg src0 = v->vgrf(glsl_type::float_type);
+   fs_reg src1 = v->vgrf(glsl_type::float_type);
+   bld.ADD(dst0, src0, src1);
+   dst0.negate = true;
+   set_saturate(true, bld.MOV(dst1, dst0));
+
+   /* = Before =
+    *
+    * 0: add(8)        dst0  src0  src1
+    * 1: mov.sat(8)    dst1  -dst0
+    *
+    * = After =
+    * 0: add.sat(8)    dst0  -src0 -src1
+    * 1: mov(8)        dst1  dst0
+    */
+
+   v->calculate_cfg();
+   bblock_t *block0 = v->cfg->blocks[0];
+
+   EXPECT_EQ(0, block0->start_ip);
+   EXPECT_EQ(1, block0->end_ip);
+
+   EXPECT_TRUE(saturate_propagation(v));
+   EXPECT_EQ(0, block0->start_ip);
+   EXPECT_EQ(1, block0->end_ip);
+   EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
+   EXPECT_TRUE(instruction(block0, 0)->saturate);
+   EXPECT_TRUE(instruction(block0, 0)->src[0].negate);
+   EXPECT_TRUE(instruction(block0, 0)->src[1].negate);
+   EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode);
+   EXPECT_FALSE(instruction(block0, 1)->saturate);
+}
+
 TEST_F(saturate_propagation_test, mul_neg_mov_sat)
 {
    const fs_builder &bld = v->bld;
@@ -492,7 +525,7 @@ TEST_F(saturate_propagation_test, intervening_dest_write)
    fs_reg src2 = v->vgrf(glsl_type::vec2_type);
    bld.ADD(offset(dst0, bld, 2), src0, src1);
    bld.emit(SHADER_OPCODE_TEX, dst0, src2)
-      ->regs_written = 4;
+      ->size_written = 4 * REG_SIZE;
    set_saturate(true, bld.MOV(dst1, offset(dst0, bld, 2)));
 
    /* = Before =