#include <gtest/gtest.h>
#include "brw_vec4.h"
+#include "brw_vs.h"
+#include "program/program.h"
using namespace brw;
int ret = 0;
-#define register_coalesce(v) _register_coalesce(v, __FUNCTION__)
+#define register_coalesce(v) _register_coalesce(v, __func__)
class register_coalesce_test : public ::testing::Test {
virtual void SetUp();
public:
- struct brw_context *brw;
- struct intel_context *intel;
+ struct brw_compiler *compiler;
+ struct brw_device_info *devinfo;
struct gl_context *ctx;
struct gl_shader_program *shader_prog;
- struct brw_vs_compile *c;
+ struct brw_vue_prog_data *prog_data;
vec4_visitor *v;
};
-void register_coalesce_test::SetUp()
+
+class register_coalesce_vec4_visitor : public vec4_visitor
{
- brw = (struct brw_context *)calloc(1, sizeof(*brw));
- intel = &brw->intel;
- ctx = &intel->ctx;
+public:
+ register_coalesce_vec4_visitor(struct brw_compiler *compiler,
+ nir_shader *shader,
+ struct brw_vue_prog_data *prog_data)
+ : vec4_visitor(compiler, NULL, NULL, prog_data, shader, NULL,
+ false /* no_spills */, -1)
+ {
+ prog_data->dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT;
+ }
+
+protected:
+ virtual dst_reg *make_reg_for_system_value(int location)
+ {
+ unreachable("Not reached");
+ }
+
+ virtual void setup_payload()
+ {
+ unreachable("Not reached");
+ }
+
+ virtual void emit_prolog()
+ {
+ unreachable("Not reached");
+ }
+
+ virtual void emit_thread_end()
+ {
+ unreachable("Not reached");
+ }
+
+ virtual void emit_urb_write_header(int mrf)
+ {
+ unreachable("Not reached");
+ }
+
+ virtual vec4_instruction *emit_urb_write_opcode(bool complete)
+ {
+ unreachable("Not reached");
+ }
+};
- c = ralloc(NULL, struct brw_vs_compile);
- c->vp = ralloc(NULL, struct brw_vertex_program);
- shader_prog = ralloc(NULL, struct gl_shader_program);
+void register_coalesce_test::SetUp()
+{
+ ctx = (struct gl_context *)calloc(1, sizeof(*ctx));
+ compiler = (struct brw_compiler *)calloc(1, sizeof(*compiler));
+ devinfo = (struct brw_device_info *)calloc(1, sizeof(*devinfo));
+ prog_data = (struct brw_vue_prog_data *)calloc(1, sizeof(*prog_data));
+ compiler->devinfo = devinfo;
- v = new vec4_visitor(brw, c, shader_prog, NULL, NULL);
+ nir_shader *shader = nir_shader_create(NULL, MESA_SHADER_VERTEX, NULL);
- _mesa_init_vertex_program(ctx, &c->vp->program, GL_VERTEX_SHADER, 0);
+ v = new register_coalesce_vec4_visitor(compiler, shader, prog_data);
- intel->gen = 4;
+ devinfo->gen = 4;
}
static void
v->dump_instructions();
}
- v->opt_compute_to_mrf();
+ v->calculate_cfg();
+ v->opt_register_coalesce();
if (print) {
printf("%s: instructions after:\n", func);
}
}
-TEST_F(register_coalesce_test, test_easy_success)
+TEST_F(register_coalesce_test, test_compute_to_mrf)
{
src_reg something = src_reg(v, glsl_type::float_type);
dst_reg temp = dst_reg(v, glsl_type::float_type);
m0.writemask = WRITEMASK_X;
m0.type = BRW_REGISTER_TYPE_F;
- vec4_instruction *mul = v->emit(v->MUL(temp, something, src_reg(1.0f)));
+ vec4_instruction *mul = v->emit(v->MUL(temp, something, brw_imm_f(1.0f)));
v->emit(v->MOV(m0, src_reg(temp)));
register_coalesce(v);
m1.type = BRW_REGISTER_TYPE_F;
src_reg src = src_reg(temp);
- vec4_instruction *mul = v->emit(v->MUL(temp, something, src_reg(1.0f)));
+ vec4_instruction *mul = v->emit(v->MUL(temp, something, brw_imm_f(1.0f)));
src.swizzle = BRW_SWIZZLE_XXXX;
v->emit(v->MOV(m0, src));
src.swizzle = BRW_SWIZZLE_XYZW;
EXPECT_EQ(dp4->dst.file, MRF);
EXPECT_EQ(dp4->dst.writemask, WRITEMASK_Y);
}
+
+TEST_F(register_coalesce_test, test_dp4_grf)
+{
+ src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
+ src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
+ dst_reg init;
+
+ dst_reg to = dst_reg(v, glsl_type::vec4_type);
+ dst_reg temp = dst_reg(v, glsl_type::float_type);
+
+ vec4_instruction *dp4 = v->emit(v->DP4(temp, some_src_1, some_src_2));
+ to.writemask = WRITEMASK_Y;
+ v->emit(v->MOV(to, src_reg(temp)));
+
+ /* if we don't do something with the result, the automatic dead code
+ * elimination will remove all our instructions.
+ */
+ src_reg src = src_reg(to);
+ src.negate = true;
+ v->emit(v->MOV(dst_reg(MRF, 0), src));
+
+ register_coalesce(v);
+
+ EXPECT_EQ(dp4->dst.nr, to.nr);
+ EXPECT_EQ(dp4->dst.writemask, WRITEMASK_Y);
+}
+
+TEST_F(register_coalesce_test, test_channel_mul_grf)
+{
+ src_reg some_src_1 = src_reg(v, glsl_type::vec4_type);
+ src_reg some_src_2 = src_reg(v, glsl_type::vec4_type);
+ dst_reg init;
+
+ dst_reg to = dst_reg(v, glsl_type::vec4_type);
+ dst_reg temp = dst_reg(v, glsl_type::float_type);
+
+ vec4_instruction *mul = v->emit(v->MUL(temp, some_src_1, some_src_2));
+ to.writemask = WRITEMASK_Y;
+ v->emit(v->MOV(to, src_reg(temp)));
+
+ /* if we don't do something with the result, the automatic dead code
+ * elimination will remove all our instructions.
+ */
+ src_reg src = src_reg(to);
+ src.negate = true;
+ v->emit(v->MOV(dst_reg(MRF, 0), src));
+
+ register_coalesce(v);
+
+ EXPECT_EQ(mul->dst.nr, to.nr);
+}