batch->buf = NULL;
}
- if (!batch->buffer)
- batch->buffer = malloc (intel->maxBatchSize);
-
batch->buf = dri_bo_alloc(intel->bufmgr, "batchbuffer",
intel->maxBatchSize, 4096);
- if (batch->buffer)
- batch->map = batch->buffer;
- else {
- dri_bo_map(batch->buf, GL_TRUE);
- batch->map = batch->buf->virtual;
- }
+ batch->map = batch->buffer;
batch->size = intel->maxBatchSize;
batch->ptr = batch->map;
+ batch->reserved_space = BATCH_RESERVED;
batch->dirty_state = ~0;
}
struct intel_batchbuffer *batch = calloc(sizeof(*batch), 1);
batch->intel = intel;
+ batch->buffer = malloc(intel->maxBatchSize);
intel_batchbuffer_reset(batch);
return batch;
void
intel_batchbuffer_free(struct intel_batchbuffer *batch)
{
- if (batch->buffer)
- free (batch->buffer);
- else {
- if (batch->map) {
- dri_bo_unmap(batch->buf);
- batch->map = NULL;
- }
- }
+ free (batch->buffer);
dri_bo_unreference(batch->buf);
batch->buf = NULL;
free(batch);
int ret = 0;
int x_off = 0, y_off = 0;
- if (batch->buffer)
- dri_bo_subdata (batch->buf, 0, used, batch->buffer);
- else
- dri_bo_unmap(batch->buf);
+ dri_bo_subdata (batch->buf, 0, used, batch->buffer);
- batch->map = NULL;
batch->ptr = NULL;
- dri_bo_exec(batch->buf, used, NULL, 0, (x_off & 0xffff) | (y_off << 16));
+ if (!intel->no_hw)
+ dri_bo_exec(batch->buf, used, NULL, 0, (x_off & 0xffff) | (y_off << 16));
if (INTEL_DEBUG & DEBUG_BATCH) {
dri_bo_map(batch->buf, GL_FALSE);
struct intel_context *intel = batch->intel;
GLuint used = batch->ptr - batch->map;
- if (!intel->using_dri2_swapbuffers &&
- intel->first_post_swapbuffers_batch == NULL) {
+ if (intel->first_post_swapbuffers_batch == NULL) {
intel->first_post_swapbuffers_batch = intel->batch->buf;
drm_intel_bo_reference(intel->first_post_swapbuffers_batch);
}
}
/* Mark the end of the buffer. */
- *(GLuint *) (batch->ptr) = MI_BATCH_BUFFER_END; /* noop */
+ *(GLuint *) (batch->ptr) = MI_BATCH_BUFFER_END;
batch->ptr += 4;
used = batch->ptr - batch->map;
+ assert (used <= batch->buf->size);
/* Workaround for recursive batchbuffer flushing: If the window is
* moved, we can get into a case where we try to flush during a
/* Check that we didn't just wrap our batchbuffer at a bad time. */
assert(!intel->no_batch_wrap);
- batch->reserved_space = BATCH_RESERVED;
-
/* TODO: Just pass the relocation list and dma buffer up to the
* kernel.
*/
{
int ret;
+ assert(delta < buffer->size);
+
if (batch->ptr - batch->map > batch->buf->size)
- _mesa_printf ("bad relocation ptr %p map %p offset %d size %d\n",
- batch->ptr, batch->map, batch->ptr - batch->map, batch->buf->size);
+ printf ("bad relocation ptr %p map %p offset %d size %lu\n",
+ batch->ptr, batch->map, batch->ptr - batch->map, batch->buf->size);
ret = dri_bo_emit_reloc(batch->buf, read_domains, write_domain,
delta, batch->ptr - batch->map, buffer);
return GL_TRUE;
}
+GLboolean
+intel_batchbuffer_emit_reloc_fenced(struct intel_batchbuffer *batch,
+ drm_intel_bo *buffer,
+ uint32_t read_domains, uint32_t write_domain,
+ uint32_t delta)
+{
+ int ret;
+
+ assert(delta < buffer->size);
+
+ if (batch->ptr - batch->map > batch->buf->size)
+ printf ("bad relocation ptr %p map %p offset %d size %lu\n",
+ batch->ptr, batch->map, batch->ptr - batch->map, batch->buf->size);
+ ret = drm_intel_bo_emit_reloc_fence(batch->buf, batch->ptr - batch->map,
+ buffer, delta,
+ read_domains, write_domain);
+
+ /*
+ * Using the old buffer offset, write in what the right data would
+ * be, in case the buffer doesn't move and we can short-circuit the
+ * relocation processing in the kernel
+ */
+ intel_batchbuffer_emit_dword (batch, buffer->offset + delta);
+
+ return GL_TRUE;
+}
+
void
intel_batchbuffer_data(struct intel_batchbuffer *batch,
const void *data, GLuint bytes)
{
struct intel_context *intel = batch->intel;
- if (intel->gen >= 4) {
+ if (intel->gen >= 6) {
+ BEGIN_BATCH(4);
+ OUT_BATCH(_3DSTATE_PIPE_CONTROL);
+ OUT_BATCH(PIPE_CONTROL_INSTRUCTION_FLUSH |
+ PIPE_CONTROL_WRITE_FLUSH |
+ PIPE_CONTROL_NO_WRITE);
+ OUT_BATCH(0); /* write address */
+ OUT_BATCH(0); /* write data */
+ ADVANCE_BATCH();
+ } else if (intel->gen >= 4) {
BEGIN_BATCH(4);
OUT_BATCH(_3DSTATE_PIPE_CONTROL |
- PIPE_CONTROL_INSTRUCTION_FLUSH |
PIPE_CONTROL_WRITE_FLUSH |
PIPE_CONTROL_NO_WRITE);
OUT_BATCH(0); /* write address */