Merge commit 'origin/7.8'
[mesa.git] / src / mesa / drivers / dri / intel / intel_chipset.h
index 2f49bf77ea1217460eaf7346c5c9168329d9b73c..a0b2266925317c3b3e739c5e8c4bef44befa3ea6 100644 (file)
@@ -1,4 +1,4 @@
-/*
+ /*
  * Copyright © 2007 Intel Corporation
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -36,6 +36,7 @@
 #define PCI_CHIP_I865_G                        0x2572
 
 #define PCI_CHIP_I915_G                        0x2582
+#define PCI_CHIP_E7221_G               0x258A
 #define PCI_CHIP_I915_GM               0x2592
 #define PCI_CHIP_I945_G                        0x2772
 #define PCI_CHIP_I945_GM               0x27A2
 #define PCI_CHIP_G33_G                 0x29C2
 #define PCI_CHIP_Q33_G                 0x29D2
 
+#define PCI_CHIP_IGD_GM                        0xA011
+#define PCI_CHIP_IGD_G                 0xA001
+
+#define IS_IGDGM(devid)        (devid == PCI_CHIP_IGD_GM)
+#define IS_IGDG(devid) (devid == PCI_CHIP_IGD_G)
+#define IS_IGD(devid) (IS_IGDG(devid) || IS_IGDGM(devid))
+
 #define PCI_CHIP_I965_G                        0x29A2
 #define PCI_CHIP_I965_Q                        0x2992
 #define PCI_CHIP_I965_G_1              0x2982
 #define PCI_CHIP_I965_GM                0x2A02
 #define PCI_CHIP_I965_GME               0x2A12
 
+#define PCI_CHIP_GM45_GM                0x2A42
+
+#define PCI_CHIP_IGD_E_G                0x2E02
+#define PCI_CHIP_Q45_G                  0x2E12
+#define PCI_CHIP_G45_G                  0x2E22
+#define PCI_CHIP_G41_G                  0x2E32
+#define PCI_CHIP_B43_G                  0x2E42
+
+#define PCI_CHIP_ILD_G                  0x0042
+#define PCI_CHIP_ILM_G                  0x0046
+
+#define PCI_CHIP_SANDYBRIDGE           0x0102
+
 #define IS_MOBILE(devid)       (devid == PCI_CHIP_I855_GM || \
                                 devid == PCI_CHIP_I915_GM || \
                                 devid == PCI_CHIP_I945_GM || \
                                 devid == PCI_CHIP_I945_GME || \
                                 devid == PCI_CHIP_I965_GM || \
-                                devid == PCI_CHIP_I965_GME)
-
-#define IS_965(devid)          (devid == PCI_CHIP_I965_G || \
-                                devid == PCI_CHIP_I965_Q || \
-                                devid == PCI_CHIP_I965_G_1 || \
-                                devid == PCI_CHIP_I965_GM || \
                                 devid == PCI_CHIP_I965_GME || \
-                                devid == PCI_CHIP_I946_GZ)
+                                devid == PCI_CHIP_GM45_GM || \
+                                IS_IGD(devid) || \
+                                devid == PCI_CHIP_ILM_G)
 
-#define IS_9XX(devid)          (devid == PCI_CHIP_I915_G || \
-                                devid == PCI_CHIP_I915_GM || \
-                                devid == PCI_CHIP_I945_G || \
+#define IS_G45(devid)           (devid == PCI_CHIP_IGD_E_G || \
+                                 devid == PCI_CHIP_Q45_G || \
+                                 devid == PCI_CHIP_G45_G || \
+                                 devid == PCI_CHIP_G41_G || \
+                                 devid == PCI_CHIP_B43_G)
+#define IS_GM45(devid)          (devid == PCI_CHIP_GM45_GM)
+#define IS_G4X(devid)          (IS_G45(devid) || IS_GM45(devid))
+
+#define IS_ILD(devid)           (devid == PCI_CHIP_ILD_G)
+#define IS_ILM(devid)           (devid == PCI_CHIP_ILM_G)
+#define IS_IGDNG(devid)           (IS_ILD(devid) || IS_ILM(devid))
+
+#define IS_915(devid)          (devid == PCI_CHIP_I915_G || \
+                                devid == PCI_CHIP_E7221_G || \
+                                devid == PCI_CHIP_I915_GM)
+
+#define IS_945(devid)          (devid == PCI_CHIP_I945_G || \
                                 devid == PCI_CHIP_I945_GM || \
                                 devid == PCI_CHIP_I945_GME || \
                                 devid == PCI_CHIP_G33_G || \
-                                devid == PCI_CHIP_Q35_G || \
                                 devid == PCI_CHIP_Q33_G || \
-                                IS_965(devid))
+                                devid == PCI_CHIP_Q35_G || IS_IGD(devid))
 
+#define IS_GEN4(devid)         (devid == PCI_CHIP_I965_G || \
+                                devid == PCI_CHIP_I965_Q || \
+                                devid == PCI_CHIP_I965_G_1 || \
+                                devid == PCI_CHIP_I965_GM || \
+                                devid == PCI_CHIP_I965_GME || \
+                                devid == PCI_CHIP_I946_GZ || \
+                                IS_G4X(devid))
+
+#define IS_GEN6(devid)         (devid == PCI_CHIP_SANDYBRIDGE)
+
+#define IS_965(devid)          (IS_GEN4(devid) || \
+                                IS_G4X(devid) || \
+                                IS_IGDNG(devid) || \
+                                IS_GEN6(devid))
+
+#define IS_9XX(devid)          (IS_915(devid) || \
+                                IS_945(devid) || \
+                                IS_965(devid))