Merge branch 'gallium-0.1' into gallium-0.2

[mesa.git] / src / mesa / drivers / dri / intel / intel_context.c

diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 6d7d6811ac7c105f823d4b8b6d26bc73ddc60471..50c1964d8784dfd9fa431d84fca244b133e40a57 100644 (file)
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -96,11 +96,13 @@ int INTEL_DEBUG = (0);
 
 #include "extension_helper.h"
 
-#define DRIVER_DATE                     "20061102"
+#define DRIVER_DATE                     "20080716"
+#define DRIVER_DATE_GEM                 "GEM " DRIVER_DATE
 
 static const GLubyte *
 intelGetString(GLcontext * ctx, GLenum name)
 {
+   const struct intel_context *const intel = intel_context(ctx);
    const char *chipset;
    static char buffer[128];
 
@@ -110,7 +112,7 @@ intelGetString(GLcontext * ctx, GLenum name)
       break;
 
    case GL_RENDERER:
-      switch (intel_context(ctx)->intelScreen->deviceID) {
+      switch (intel->intelScreen->deviceID) {
       case PCI_CHIP_845_G:
          chipset = "Intel(R) 845G";
          break;
@@ -166,7 +168,9 @@ intelGetString(GLcontext * ctx, GLenum name)
       case PCI_CHIP_I965_GME:
         chipset = "Intel(R) 965GME/GLE";
         break;
-      case PCI_CHIP_IGD_GM:
+      case PCI_CHIP_GM45_GM:
+        chipset = "Mobile Intel® GM45 Express Chipset";
+        break; 
       case PCI_CHIP_IGD_E_G:
         chipset = "Intel(R) Integrated Graphics Device";
         break;
@@ -181,7 +185,9 @@ intelGetString(GLcontext * ctx, GLenum name)
          break;
       }
 
-      (void) driGetRendererString(buffer, chipset, DRIVER_DATE, 0);
+      (void) driGetRendererString(buffer, chipset, 
+                                 (intel->ttm) ? DRIVER_DATE_GEM : DRIVER_DATE,
+                                 0);
       return (GLubyte *) buffer;
 
    default:
@@ -192,9 +198,8 @@ intelGetString(GLcontext * ctx, GLenum name)
 /**
  * Extension strings exported by the intel driver.
  *
- * \note
- * It appears that ARB_texture_env_crossbar has "disappeared" compared to the
- * old i830-specific driver.
+ * Extensions supported by all chips supported by i830_dri, i915_dri, or
+ * i965_dri.
  */
 static const struct dri_extension card_extensions[] = {
    {"GL_ARB_multisample", GL_ARB_multisample_functions},
@@ -206,6 +211,7 @@ static const struct dri_extension card_extensions[] = {
    {"GL_ARB_texture_cube_map", NULL},
    {"GL_ARB_texture_env_add", NULL},
    {"GL_ARB_texture_env_combine", NULL},
+   {"GL_ARB_texture_env_crossbar", NULL},
    {"GL_ARB_texture_env_dot3", NULL},
    {"GL_ARB_texture_mirrored_repeat", NULL},
    {"GL_ARB_texture_non_power_of_two",   NULL },
@@ -260,9 +266,9 @@ static const struct dri_extension brw_extensions[] = {
    { "GL_ARB_fragment_program",           NULL },
    { "GL_ARB_shadow",                     NULL },
    { "GL_EXT_shadow_funcs",               NULL },
+   { "GL_ARB_fragment_program_shadow",    NULL },
    /* ARB extn won't work if not enabled */
    { "GL_SGIX_depth_texture",             NULL },
-   { "GL_ARB_texture_env_crossbar",       NULL },
    { "GL_EXT_texture_sRGB",              NULL},
    { NULL,                                NULL }
 };
@@ -365,6 +371,12 @@ intelFlush(GLcontext * ctx)
    if (!IS_965(intel->intelScreen->deviceID))
       INTEL_FIREVERTICES(intel);
 
+   /* Emit a flush so that any frontbuffer rendering that might have occurred
+    * lands onscreen in a timely manner, even if the X Server doesn't trigger
+    * a flush for us.
+    */
+   intel_batchbuffer_emit_mi_flush(intel->batch);
+
    if (intel->batch->map != intel->batch->ptr)
       intel_batchbuffer_flush(intel->batch);
 }
@@ -453,7 +465,14 @@ intel_init_bufmgr(struct intel_context *intel)
 {
    intelScreenPrivate *intelScreen = intel->intelScreen;
    GLboolean gem_disable = getenv("INTEL_NO_GEM") != NULL;
+   int gem_kernel = 0;
    GLboolean gem_supported;
+   struct drm_i915_getparam gp;
+
+   gp.param = I915_PARAM_HAS_GEM;
+   gp.value = &gem_kernel;
+
+   (void) drmCommandWriteRead(intel->driFd, DRM_I915_GETPARAM, &gp, sizeof(gp));
 
    /* If we've got a new enough DDX that's initializing GEM and giving us
     * object handles for the shared buffers, use that.
@@ -462,7 +481,7 @@ intel_init_bufmgr(struct intel_context *intel)
    if (intel->intelScreen->driScrnPriv->dri2.enabled)
        gem_supported = GL_TRUE;
    else if (intel->intelScreen->driScrnPriv->ddx_version.minor >= 9 &&
-           intel->intelScreen->drmMinor >= 11 &&
+           gem_kernel &&
            intel->intelScreen->front.bo_handle != -1)
        gem_supported = GL_TRUE;
    else
@@ -1008,6 +1027,7 @@ void UNLOCK_HARDWARE( struct intel_context *intel )
     * Nothing should be left in batch outside of LOCK/UNLOCK which references
     * cliprects.
     */
-   assert(intel->batch->cliprect_mode != REFERENCES_CLIPRECTS);
+   if (intel->batch->cliprect_mode == REFERENCES_CLIPRECTS)
+      intel_batchbuffer_flush(intel->batch);
 }