void (*finish_batch) (struct intel_context * intel);
void (*new_batch) (struct intel_context * intel);
void (*emit_invarient_state) (struct intel_context * intel);
- void (*note_fence) (struct intel_context *intel, GLuint fence);
void (*update_texture_state) (struct intel_context * intel);
void (*render_start) (struct intel_context * intel);
void (*invalidate_state) (struct intel_context *intel,
GLuint new_state);
-
- /* Metaops:
- */
- void (*install_meta_state) (struct intel_context * intel);
- void (*leave_meta_state) (struct intel_context * intel);
-
- void (*meta_draw_region) (struct intel_context * intel,
- struct intel_region * draw_region,
- struct intel_region * depth_region);
-
- void (*meta_color_mask) (struct intel_context * intel, GLboolean);
-
- void (*meta_stencil_replace) (struct intel_context * intel,
- GLuint mask, GLuint clear);
-
- void (*meta_depth_replace) (struct intel_context * intel);
-
- void (*meta_texture_blend_replace) (struct intel_context * intel);
-
- void (*meta_no_stencil_write) (struct intel_context * intel);
- void (*meta_no_depth_write) (struct intel_context * intel);
- void (*meta_no_texture) (struct intel_context * intel);
-
- void (*meta_import_pixel_state) (struct intel_context * intel);
- void (*meta_frame_buffer_texture) (struct intel_context *intel,
- GLint xoff, GLint yoff);
-
- GLboolean(*meta_tex_rect_source) (struct intel_context * intel,
- dri_bo * buffer,
- GLuint offset,
- GLuint pitch,
- GLuint height,
- GLenum format, GLenum type);
-
void (*assert_not_dirty) (struct intel_context *intel);
void (*debug_batch)(struct intel_context *intel);
* Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
*/
int gen;
+ GLboolean needs_ff_sync;
+ GLboolean is_ironlake;
+ GLboolean is_g4x;
+ GLboolean is_945;
+ GLboolean has_luminance_srgb;
- struct intel_region *front_region;
- struct intel_region *back_region;
- struct intel_region *depth_region;
+ int urb_size;
struct intel_batchbuffer *batch;
drm_intel_bo *first_post_swapbuffers_batch;
GLboolean no_batch_wrap;
+ GLboolean using_dri2_swapbuffers;
struct
{
intel_line_func draw_line;
intel_tri_func draw_tri;
- /**
- * Set to true if a single constant cliprect should be used in the
- * batchbuffer. Otherwise, cliprects must be calculated at batchbuffer
- * flush time while the lock is held.
- */
- GLboolean constant_cliprect;
-
- /**
- * In !constant_cliprect mode, set to true if the front cliprects should be
- * used instead of back.
- */
- GLboolean front_cliprects;
-
/**
* Set if rendering has occured to the drawable's front buffer.
*
GLboolean use_texture_tiling;
GLboolean use_early_z;
- drm_clip_rect_t fboRect; /**< cliprect for FBO rendering */
-
- drm_clip_rect_t draw_rect;
- drm_clip_rect_t scissor_rect;
- drm_context_t hHWContext;
- drmLock *driHwLock;
int driFd;
- __DRIcontextPrivate *driContext;
- __DRIdrawablePrivate *driDrawable;
- __DRIdrawablePrivate *driReadDrawable;
- __DRIscreenPrivate *driScreen;
- intelScreenPrivate *intelScreen;
- volatile drm_i915_sarea_t *sarea;
-
- GLuint lastStamp;
+ __DRIcontext *driContext;
+ struct intel_screen *intelScreen;
/**
* Configuration cache
*/
driOptionCache optionCache;
-
- int64_t swap_ust;
- int64_t swap_missed_ust;
-
- GLuint swap_count;
- GLuint swap_missed_count;
};
-/* These are functions now:
- */
-void LOCK_HARDWARE( struct intel_context *intel );
-void UNLOCK_HARDWARE( struct intel_context *intel );
-
extern char *__progname;
#define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1))
#define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
-static inline uint32_t
+static INLINE uint32_t
U_FIXED(float value, uint32_t frac_bits)
{
value *= (1 << frac_bits);
return value < 0 ? 0 : value;
}
-static inline uint32_t
+static INLINE uint32_t
S_FIXED(float value, uint32_t frac_bits)
{
return value * (1 << frac_bits);
#define DEBUG_WM 0x800000
#define DEBUG_URB 0x1000000
#define DEBUG_VS 0x2000000
+#define DEBUG_GLSL_FORCE 0x4000000
#define DBG(...) do { \
if (INTEL_DEBUG & FILE_DEBUG_FLAG) \
- _mesa_printf(__VA_ARGS__); \
+ printf(__VA_ARGS__); \
} while(0)
#define PCI_CHIP_845_G 0x2562
extern GLboolean intelInitContext(struct intel_context *intel,
const __GLcontextModes * mesaVis,
- __DRIcontextPrivate * driContextPriv,
+ __DRIcontext * driContextPriv,
void *sharedContextPrivate,
struct dd_function_table *functions);
-extern void intelGetLock(struct intel_context *intel, GLuint flags);
-
extern void intelFinish(GLcontext * ctx);
extern void intelFlush(GLcontext * ctx);
+extern void intel_flush(GLcontext * ctx, GLboolean needs_mi_flush);
extern void intelInitDriverFunctions(struct dd_function_table *functions);
void intel_update_renderbuffers(__DRIcontext *context,
__DRIdrawable *drawable);
+void intel_prepare_render(struct intel_context *intel);
void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
uint32_t buffer_id);
return (value & (value - 1)) == 0;
}
-static inline void
-intel_bo_map_gtt_preferred(struct intel_context *intel,
- drm_intel_bo *bo,
- GLboolean write)
-{
- if (intel->intelScreen->kernel_exec_fencing)
- drm_intel_gem_bo_map_gtt(bo);
- else
- drm_intel_bo_map(bo, write);
-}
-
-static inline void
-intel_bo_unmap_gtt_preferred(struct intel_context *intel,
- drm_intel_bo *bo)
-{
- if (intel->intelScreen->kernel_exec_fencing)
- drm_intel_gem_bo_unmap_gtt(bo);
- else
- drm_intel_bo_unmap(bo);
-}
-
#endif