[g3dvl] move z-coord generation for multiple render targets into vertex shader
[mesa.git] / src / mesa / drivers / dri / intel / intel_mipmap_tree.c
index 6a565f80cf4308301a1270f8a141a7ac003e94a6..9c4e5c5ee8c9288108d22c63208ea08156cb1655 100644 (file)
 #include "intel_mipmap_tree.h"
 #include "intel_regions.h"
 #include "intel_tex_layout.h"
-#include "intel_chipset.h"
-#ifndef I915
-#include "brw_state.h"
-#endif
 #include "main/enums.h"
+#include "main/formats.h"
 
 #define FILE_DEBUG_FLAG DEBUG_MIPTREE
 
@@ -84,10 +81,9 @@ intel_miptree_create_internal(struct intel_context *intel,
    mt->cpp = compress_byte ? compress_byte : cpp;
    mt->compressed = compress_byte ? 1 : 0;
    mt->refcount = 1; 
-   mt->pitch = 0;
 
 #ifdef I915
-   if (IS_945(intel->intelScreen->deviceID))
+   if (intel->is_945)
       ok = i945_miptree_layout(intel, mt, tiling);
    else
       ok = i915_miptree_layout(intel, mt, tiling);
@@ -118,18 +114,16 @@ intel_miptree_create(struct intel_context *intel,
                     GLboolean expect_accelerated_upload)
 {
    struct intel_mipmap_tree *mt;
-   uint32_t tiling;
+   uint32_t tiling = I915_TILING_NONE;
 
-   if (intel->use_texture_tiling && compress_byte == 0 &&
-       intel->intelScreen->kernel_exec_fencing) {
+   if (intel->use_texture_tiling && compress_byte == 0) {
       if (intel->gen >= 4 &&
          (base_format == GL_DEPTH_COMPONENT ||
           base_format == GL_DEPTH_STENCIL_EXT))
         tiling = I915_TILING_Y;
-      else
+      else if (width0 >= 64)
         tiling = I915_TILING_X;
-   } else
-      tiling = I915_TILING_NONE;
+   }
 
    mt = intel_miptree_create_internal(intel, target, internal_format,
                                      first_level, last_level, width0,
@@ -138,17 +132,16 @@ intel_miptree_create(struct intel_context *intel,
    /*
     * pitch == 0 || height == 0  indicates the null texture
     */
-   if (!mt || !mt->pitch || !mt->total_height) {
+   if (!mt || !mt->total_height) {
       free(mt);
       return NULL;
    }
 
-   mt->region = intel_region_alloc(intel,
+   mt->region = intel_region_alloc(intel->intelScreen,
                                   tiling,
                                   mt->cpp,
-                                  mt->pitch,
+                                  mt->total_width,
                                   mt->total_height,
-                                  mt->pitch,
                                   expect_accelerated_upload);
 
    if (!mt->region) {
@@ -179,81 +172,12 @@ intel_miptree_create_for_region(struct intel_context *intel,
                                      I915_TILING_NONE);
    if (!mt)
       return mt;
-#if 0
-   if (mt->pitch != region->pitch) {
-      fprintf(stderr,
-             "region pitch (%d) doesn't match mipmap tree pitch (%d)\n",
-             region->pitch, mt->pitch);
-      free(mt);
-      return NULL;
-   }
-#else
-   /* The mipmap tree pitch is aligned to 64 bytes to make sure render
-    * to texture works, but we don't need that for texturing from a
-    * pixmap.  Just override it here. */
-   mt->pitch = region->pitch;
-#endif
 
    intel_region_reference(&mt->region, region);
 
    return mt;
 }
 
-
-/**
- * intel_miptree_pitch_align:
- *
- * @intel: intel context pointer
- *
- * @mt: the miptree to compute pitch alignment for
- *
- * @pitch: the natural pitch value
- *
- * Given @pitch, compute a larger value which accounts for
- * any necessary alignment required by the device
- */
-int intel_miptree_pitch_align (struct intel_context *intel,
-                              struct intel_mipmap_tree *mt,
-                              uint32_t tiling,
-                              int pitch)
-{
-#ifdef I915
-   GLcontext *ctx = &intel->ctx;
-#endif
-
-   if (!mt->compressed) {
-      int pitch_align;
-
-      /* XXX: Align pitch to multiple of 64 bytes for now to allow
-       * render-to-texture to work in all cases. This should probably be
-       * replaced at some point by some scheme to only do this when really
-       * necessary.
-       */
-      pitch_align = 64;
-
-      if (tiling == I915_TILING_X)
-        pitch_align = 512;
-      else if (tiling == I915_TILING_Y)
-        pitch_align = 128;
-
-      pitch = ALIGN(pitch * mt->cpp, pitch_align);
-
-#ifdef I915
-      /* XXX: At least the i915 seems very upset when the pitch is a multiple
-       * of 1024 and sometimes 512 bytes - performance can drop by several
-       * times. Go to the next multiple of the required alignment for now.
-       */
-      if (!(pitch & 511) && 
-        (pitch + pitch_align) < (1 << ctx->Const.MaxTextureLevels))
-        pitch += pitch_align;
-#endif
-
-      pitch /= mt->cpp;
-   }
-   return pitch;
-}
-
-
 void
 intel_miptree_reference(struct intel_mipmap_tree **dst,
                         struct intel_mipmap_tree *src)
@@ -277,19 +201,6 @@ intel_miptree_release(struct intel_context *intel,
 
       DBG("%s deleting %p\n", __FUNCTION__, *mt);
 
-#ifndef I915
-      /* Free up cached binding tables holding a reference on our buffer, to
-       * avoid excessive memory consumption.
-       *
-       * This isn't as aggressive as we could be, as we'd like to do
-       * it from any time we free the last ref on a region.  But intel_region.c
-       * is context-agnostic.  Perhaps our constant state cache should be, as
-       * well.
-       */
-      brw_state_cache_bo_delete(&brw_context(&intel->ctx)->surface_cache,
-                               (*mt)->region->buffer);
-#endif
-
       intel_region_release(&((*mt)->region));
 
       for (i = 0; i < MAX_TEXTURE_LEVELS; i++) {
@@ -353,13 +264,12 @@ intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
    mt->level[level].width = w;
    mt->level[level].height = h;
    mt->level[level].depth = d;
-   mt->level[level].level_offset = (x + y * mt->pitch) * mt->cpp;
    mt->level[level].level_x = x;
    mt->level[level].level_y = y;
    mt->level[level].nr_images = nr_images;
 
-   DBG("%s level %d size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__,
-       level, w, h, d, x, y, mt->level[level].level_offset);
+   DBG("%s level %d size: %d,%d,%d offset %d,%d\n", __FUNCTION__,
+       level, w, h, d, x, y);
 
    assert(nr_images);
    assert(!mt->level[level].x_offset);
@@ -423,10 +333,9 @@ intel_miptree_image_map(struct intel_context * intel,
                         GLuint * row_stride, GLuint * image_offsets)
 {
    GLuint x, y;
-   DBG("%s \n", __FUNCTION__);
 
    if (row_stride)
-      *row_stride = mt->pitch * mt->cpp;
+      *row_stride = mt->region->pitch * mt->cpp;
 
    if (mt->target == GL_TEXTURE_3D) {
       int i;
@@ -435,9 +344,11 @@ intel_miptree_image_map(struct intel_context * intel,
 
         intel_miptree_get_image_offset(mt, level, face, i,
                                        &x, &y);
-        image_offsets[i] = x + y * mt->pitch;
+        image_offsets[i] = x + y * mt->region->pitch;
       }
 
+      DBG("%s \n", __FUNCTION__);
+
       return intel_region_map(intel, mt->region);
    } else {
       assert(mt->level[level].depth == 1);
@@ -445,8 +356,11 @@ intel_miptree_image_map(struct intel_context * intel,
                                     &x, &y);
       image_offsets[0] = 0;
 
+      DBG("%s: (%d,%d) -> (%d, %d)/%d\n",
+         __FUNCTION__, face, level, x, y, mt->region->pitch * mt->cpp);
+
       return intel_region_map(intel, mt->region) +
-        (x + y * mt->pitch) * mt->cpp;
+        (x + y * mt->region->pitch) * mt->cpp;
    }
 }
 
@@ -475,7 +389,6 @@ intel_miptree_image_data(struct intel_context *intel,
    const GLuint depth = dst->level[level].depth;
    GLuint i;
 
-   DBG("%s: %d/%d\n", __FUNCTION__, face, level);
    for (i = 0; i < depth; i++) {
       GLuint dst_x, dst_y, height;
 
@@ -485,6 +398,12 @@ intel_miptree_image_data(struct intel_context *intel,
       if(dst->compressed)
         height = (height + 3) / 4;
 
+      DBG("%s: %d/%d %p/%d -> (%d, %d)/%d (%d, %d)\n",
+         __FUNCTION__, face, level,
+         src, src_row_pitch * dst->cpp,
+         dst_x, dst_y, dst->region->pitch * dst->cpp,
+         dst->level[level].width, height);
+
       intel_region_data(intel,
                        dst->region, 0, dst_x, dst_y,
                        src,
@@ -522,12 +441,15 @@ intel_miptree_image_copy(struct intel_context *intel,
        width = ALIGN(width, align_w);
    }
 
+   intel_prepare_render(intel);
+
    for (i = 0; i < depth; i++) {
       intel_miptree_get_image_offset(src, level, face, i, &src_x, &src_y);
       intel_miptree_get_image_offset(dst, level, face, i, &dst_x, &dst_y);
       success = intel_region_copy(intel,
                                  dst->region, 0, dst_x, dst_y,
-                                 src->region, 0, src_x, src_y, width, height,
+                                 src->region, 0, src_x, src_y,
+                                 width, height, GL_FALSE,
                                  GL_COPY);
       if (!success) {
         GLubyte *src_ptr, *dst_ptr;
@@ -535,13 +457,13 @@ intel_miptree_image_copy(struct intel_context *intel,
         src_ptr = intel_region_map(intel, src->region);
         dst_ptr = intel_region_map(intel, dst->region);
 
-        _mesa_copy_rect(dst_ptr + dst->cpp * (dst_x + dst_y * dst->pitch),
+        _mesa_copy_rect(dst_ptr,
                         dst->cpp,
-                        dst->pitch,
-                        0, 0, width, height,
-                        src_ptr + src->cpp * (src_x + src_y * src->pitch),
-                        src->pitch,
-                        0, 0);
+                        dst->region->pitch,
+                        dst_x, dst_y, width, height,
+                        src_ptr,
+                        src->region->pitch,
+                        src_x, src_y);
         intel_region_unmap(intel, src->region);
         intel_region_unmap(intel, dst->region);
       }