Merge branch 'const-buffer-changes'

[mesa.git] / src / mesa / drivers / dri / intel / intel_reg.h

diff --git a/src/mesa/drivers/dri/intel/intel_reg.h b/src/mesa/drivers/dri/intel/intel_reg.h
index 96af7e1a030aa1ec0a47ab8c619db6a0cbbabeb2..57ac8f0cc14cb70782717c29c0f6cd33d621a61a 100644 (file)
--- a/src/mesa/drivers/dri/intel/intel_reg.h
+++ b/src/mesa/drivers/dri/intel/intel_reg.h
@@ -29,6 +29,8 @@
 #define CMD_2D                         (0x2 << 29)
 #define CMD_3D                         (0x3 << 29)
 
+#define MI_NOOP                                (CMD_MI | 0)
+
 #define MI_BATCH_BUFFER_END            (CMD_MI | 0xA << 23)
 
 #define MI_FLUSH                       (CMD_MI | (4 << 23))
@@ -44,19 +46,41 @@
 #define _3DSTATE_LOAD_STATE_IMMEDIATE_1   (CMD_3D | (0x1d<<24) | (0x04<<16))
 #define I1_LOAD_S(n)                      (1<<(4+n))
 
+#define _3DSTATE_DRAWRECT_INFO         (CMD_3D | (0x1d<<24) | (0x80<<16) | 0x3)
+#define _3DSTATE_DRAWRECT_INFO_I965    (CMD_3D | (3 << 27) | (1 << 24) | 0x2)
+
+/** @{
+ *
+ * PIPE_CONTROL operation, a combination MI_FLUSH and register write with
+ * additional flushing control.
+ */
+#define _3DSTATE_PIPE_CONTROL          (CMD_3D | (3 << 27) | (2 << 24) | 2)
+#define PIPE_CONTROL_NO_WRITE          (0 << 14)
+#define PIPE_CONTROL_WRITE_IMMEDIATE   (1 << 14)
+#define PIPE_CONTROL_WRITE_DEPTH_COUNT (2 << 14)
+#define PIPE_CONTROL_WRITE_TIMESTAMP   (3 << 14)
+#define PIPE_CONTROL_DEPTH_STALL       (1 << 13)
+#define PIPE_CONTROL_WRITE_FLUSH       (1 << 12)
+#define PIPE_CONTROL_INSTRUCTION_FLUSH (1 << 11)
+#define PIPE_CONTROL_INTERRUPT_ENABLE  (1 << 8)
+#define PIPE_CONTROL_PPGTT_WRITE       (0 << 2)
+#define PIPE_CONTROL_GLOBAL_GTT_WRITE  (1 << 2)
+
+/** @} */
+
 /** @{
  * 915 definitions
  */
-#define S0_VB_OFFSET_MASK              0xffffffc
+#define S0_VB_OFFSET_MASK              0xffffffc0
 #define S0_AUTO_CACHE_INV_DISABLE      (1<<0)
 /** @} */
 
 /** @{
  * 830 definitions
  */
-#define S0_VB_OFFSET_MASK_830          0xffffff8
+#define S0_VB_OFFSET_MASK_830          0xffffff80
 #define S0_VB_PITCH_SHIFT_830          1
-#define S0_VB_ENABLE_830               0
+#define S0_VB_ENABLE_830               (1<<0)
 /** @} */
 
 #define S1_VERTEX_WIDTH_SHIFT          24
@@ -76,8 +100,8 @@
 #define S2_TEXCOORD_FMT(unit, type)    ((type)<<(unit*4))
 #define S2_TEXCOORD_NONE               (~0)
 #define S2_TEX_COUNT_SHIFT_830         12
-#define S2_VERTEX_0_WIDTH_SHIFT_830    0
-#define S2_VERTEX_1_WIDTH_SHIFT_830    6
+#define S2_VERTEX_1_WIDTH_SHIFT_830    0
+#define S2_VERTEX_0_WIDTH_SHIFT_830    6
 /* S3 not interesting */
 
 #define S4_POINT_WIDTH_SHIFT           23