}
}
-static int
-intel_set_region_tiling_gem(struct intel_context *intel,
- struct intel_region *region,
- uint32_t bo_handle)
-{
- struct drm_i915_gem_get_tiling get_tiling;
- int ret;
-
- memset(&get_tiling, 0, sizeof(get_tiling));
-
- get_tiling.handle = bo_handle;
- ret = ioctl(intel->driFd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling);
- if (ret != 0) {
- fprintf(stderr, "Failed to get tiling state for region: %s\n",
- strerror(errno));
- return ret;
- }
-
- region->tiling = get_tiling.tiling_mode;
- region->bit_6_swizzle = get_tiling.swizzle_mode;
-
- return 0;
-}
-
static struct intel_region *
intel_region_alloc_internal(struct intel_context *intel,
GLuint cpp,
struct intel_region *
intel_region_alloc(struct intel_context *intel,
- GLuint cpp, GLuint width, GLuint height, GLuint pitch)
+ GLuint cpp, GLuint width, GLuint height, GLuint pitch,
+ GLboolean expect_accelerated_upload)
{
dri_bo *buffer;
- buffer = dri_bo_alloc(intel->bufmgr, "region",
- pitch * cpp * height, 64);
+ if (expect_accelerated_upload) {
+ buffer = drm_intel_bo_alloc_for_render(intel->bufmgr, "region",
+ pitch * cpp * height, 64);
+ } else {
+ buffer = drm_intel_bo_alloc(intel->bufmgr, "region",
+ pitch * cpp * height, 64);
+ }
return intel_region_alloc_internal(intel, cpp, width, height, pitch, buffer);
}
{
struct intel_region *region;
dri_bo *buffer;
+ int ret;
buffer = intel_bo_gem_create_from_name(intel->bufmgr, name, handle);
if (region == NULL)
return region;
- intel_set_region_tiling_gem(intel, region, handle);
+ ret = dri_bo_get_tiling(region->buffer, ®ion->tiling,
+ ®ion->bit_6_swizzle);
+ if (ret != 0) {
+ fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
+ handle, name, strerror(-ret));
+ intel_region_release(®ion);
+ return NULL;
+ }
return region;
}
intel_region_reference(struct intel_region **dst, struct intel_region *src)
{
if (src)
- DBG("%s %d\n", __FUNCTION__, src->refcount);
+ DBG("%s %p %d\n", __FUNCTION__, src, src->refcount);
assert(*dst == NULL);
if (src) {
if (region == NULL)
return;
- DBG("%s %d\n", __FUNCTION__, region->refcount - 1);
+ DBG("%s %p %d\n", __FUNCTION__, region, region->refcount - 1);
ASSERT(region->refcount > 0);
region->refcount--;
else
region->cpp = intel->ctx.Visual.rgbBits / 8;
region->pitch = intelScreen->pitch;
- region->height = intelScreen->height; /* needed? */
+ region->width = intelScreen->width;
+ region->height = intelScreen->height;
if (region->buffer != NULL) {
dri_bo_unreference(region->buffer);
name,
region_desc->bo_handle);
- intel_set_region_tiling_gem(intel, region, region_desc->bo_handle);
+ ret = dri_bo_get_tiling(region->buffer, ®ion->tiling,
+ ®ion->bit_6_swizzle);
+ if (ret != 0) {
+ fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
+ region_desc->bo_handle, name, strerror(-ret));
+ intel_region_release(®ion);
+ return NULL;
+ }
} else {
if (region->classic_map != NULL) {
drmUnmap(region->classic_map,
intel->back_region,
&intelScreen->back);
-#ifdef I915
- if (intelScreen->third.handle) {
- intel->third_region =
- intel_recreate_static(intel, "third",
- intel->third_region,
- &intelScreen->third);
- }
-#endif /* I915 */
-
/* Still assumes front.cpp == depth.cpp. We can kill this when we move to
* private buffers.
*/