* last moment.
*/
+#include <sys/ioctl.h>
+#include <errno.h>
+
#include "intel_context.h"
#include "intel_regions.h"
#include "intel_blit.h"
#include "intel_buffer_objects.h"
-#include "dri_bufmgr.h"
-#include "intel_bufmgr_ttm.h"
+#include "intel_bufmgr.h"
#include "intel_batchbuffer.h"
+#include "intel_chipset.h"
#define FILE_DEBUG_FLAG DEBUG_REGION
}
}
-struct intel_region *
-intel_region_alloc(struct intel_context *intel,
- GLuint cpp, GLuint pitch, GLuint height)
+static struct intel_region *
+intel_region_alloc_internal(struct intel_context *intel,
+ GLuint cpp,
+ GLuint width, GLuint height, GLuint pitch,
+ dri_bo *buffer)
{
- struct intel_region *region = calloc(sizeof(*region), 1);
+ struct intel_region *region;
DBG("%s\n", __FUNCTION__);
+ if (buffer == NULL)
+ return NULL;
+
+ region = calloc(sizeof(*region), 1);
region->cpp = cpp;
+ region->width = width;
+ region->height = height;
region->pitch = pitch;
- region->height = height; /* needed? */
region->refcount = 1;
+ region->buffer = buffer;
+
+ /* Default to no tiling */
+ region->tiling = I915_TILING_NONE;
+ region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE;
+
+ return region;
+}
+
+struct intel_region *
+intel_region_alloc(struct intel_context *intel,
+ GLuint cpp, GLuint width, GLuint height, GLuint pitch)
+{
+ dri_bo *buffer;
+
+ buffer = dri_bo_alloc(intel->bufmgr, "region",
+ pitch * cpp * height, 64);
+
+ return intel_region_alloc_internal(intel, cpp, width, height, pitch, buffer);
+}
+
+struct intel_region *
+intel_region_alloc_for_handle(struct intel_context *intel,
+ GLuint cpp,
+ GLuint width, GLuint height, GLuint pitch,
+ GLuint handle, const char *name)
+{
+ struct intel_region *region;
+ dri_bo *buffer;
+ int ret;
+
+ buffer = intel_bo_gem_create_from_name(intel->bufmgr, name, handle);
+
+ region = intel_region_alloc_internal(intel, cpp,
+ width, height, pitch, buffer);
+ if (region == NULL)
+ return region;
+
+ ret = dri_bo_get_tiling(region->buffer, ®ion->tiling,
+ ®ion->bit_6_swizzle);
+ if (ret != 0) {
+ fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
+ handle, name, strerror(-ret));
+ intel_region_release(®ion);
+ return NULL;
+ }
- region->buffer = dri_bo_alloc(intel->bufmgr, "region",
- pitch * cpp * height, 64, DRM_BO_FLAG_MEM_TT);
return region;
}
void
intel_region_reference(struct intel_region **dst, struct intel_region *src)
{
+ if (src)
+ DBG("%s %d\n", __FUNCTION__, src->refcount);
+
assert(*dst == NULL);
if (src) {
src->refcount++;
}
void
-intel_region_release(struct intel_region **region)
+intel_region_release(struct intel_region **region_handle)
{
- if (!*region)
+ struct intel_region *region = *region_handle;
+
+ if (region == NULL)
return;
- DBG("%s %d\n", __FUNCTION__, (*region)->refcount - 1);
+ DBG("%s %d\n", __FUNCTION__, region->refcount - 1);
+
+ ASSERT(region->refcount > 0);
+ region->refcount--;
- ASSERT((*region)->refcount > 0);
- (*region)->refcount--;
+ if (region->refcount == 0) {
+ assert(region->map_refcount == 0);
- if ((*region)->refcount == 0) {
- assert((*region)->map_refcount == 0);
+ if (region->pbo)
+ region->pbo->region = NULL;
+ region->pbo = NULL;
+ dri_bo_unreference(region->buffer);
- if ((*region)->pbo)
- (*region)->pbo->region = NULL;
- (*region)->pbo = NULL;
- dri_bo_unreference((*region)->buffer);
- free(*region);
+ if (region->classic_map != NULL) {
+ drmUnmap(region->classic_map,
+ region->pitch * region->cpp * region->height);
+ }
+
+ free(region);
}
- *region = NULL;
+ *region_handle = NULL;
}
/*
* XXX Move this into core Mesa?
*/
-static void
+void
_mesa_copy_rect(GLubyte * dst,
GLuint cpp,
GLuint dst_pitch,
intelEmitCopyBlit(intel,
dst->cpp,
- src->pitch, src->buffer, src_offset, src->tiled,
- dst->pitch, dst->buffer, dst_offset, dst->tiled,
+ src->pitch, src->buffer, src_offset, src->tiling,
+ dst->pitch, dst->buffer, dst_offset, dst->tiling,
srcx, srcy, dstx, dsty, width, height,
GL_COPY);
}
intelEmitFillBlit(intel,
dst->cpp,
- dst->pitch, dst->buffer, dst_offset, dst->tiled,
+ dst->pitch, dst->buffer, dst_offset, dst->tiling,
dstx, dsty, width, height, color);
}
region->buffer = dri_bo_alloc(intel->bufmgr, "region",
region->pitch * region->cpp * region->height,
- 64, DRM_BO_FLAG_MEM_TT);
+ 64);
}
/* Break the COW tie to the pbo. Both the pbo and the region end up
/* Now blit from the texture buffer to the new buffer:
*/
- intel_batchbuffer_flush(intel->batch);
-
was_locked = intel->locked;
- if (intel->locked)
+ if (!was_locked)
LOCK_HARDWARE(intel);
intelEmitCopyBlit(intel,
region->cpp,
- region->pitch, region->buffer, 0, region->tiled,
- region->pitch, pbo->buffer, 0, region->tiled,
+ region->pitch, region->buffer, 0, region->tiling,
+ region->pitch, pbo->buffer, 0, region->tiling,
0, 0, 0, 0,
region->pitch, region->height,
GL_COPY);
- intel_batchbuffer_flush(intel->batch);
-
- if (was_locked)
+ if (!was_locked)
UNLOCK_HARDWARE(intel);
}
intel_recreate_static(struct intel_context *intel,
const char *name,
struct intel_region *region,
- intelRegion *region_desc,
- GLuint mem_type)
+ intelRegion *region_desc)
{
intelScreenPrivate *intelScreen = intel->intelScreen;
+ int ret;
if (region == NULL) {
region = calloc(sizeof(*region), 1);
region->refcount = 1;
}
- region->cpp = intelScreen->cpp;
- region->pitch = region_desc->pitch / intelScreen->cpp;
+ if (intel->ctx.Visual.rgbBits == 24)
+ region->cpp = 4;
+ else
+ region->cpp = intel->ctx.Visual.rgbBits / 8;
+ region->pitch = intelScreen->pitch;
region->height = intelScreen->height; /* needed? */
- region->tiled = region_desc->tiled;
+
+ if (region->buffer != NULL) {
+ dri_bo_unreference(region->buffer);
+ region->buffer = NULL;
+ }
if (intel->ttm) {
assert(region_desc->bo_handle != -1);
- region->buffer = intel_ttm_bo_create_from_handle(intel->bufmgr,
- name,
- region_desc->bo_handle);
+ region->buffer = intel_bo_gem_create_from_name(intel->bufmgr,
+ name,
+ region_desc->bo_handle);
+
+ ret = dri_bo_get_tiling(region->buffer, ®ion->tiling,
+ ®ion->bit_6_swizzle);
+ if (ret != 0) {
+ fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
+ region_desc->bo_handle, name, strerror(-ret));
+ intel_region_release(®ion);
+ return NULL;
+ }
} else {
- region->buffer = dri_bo_alloc_static(intel->bufmgr,
- name,
- region_desc->offset,
- region_desc->pitch *
- intelScreen->height,
- region_desc->map,
- DRM_BO_FLAG_MEM_TT);
+ if (region->classic_map != NULL) {
+ drmUnmap(region->classic_map,
+ region->pitch * region->cpp * region->height);
+ region->classic_map = NULL;
+ }
+ ret = drmMap(intel->driFd, region_desc->handle,
+ region->pitch * region->cpp * region->height,
+ ®ion->classic_map);
+ if (ret != 0) {
+ fprintf(stderr, "Failed to drmMap %s buffer\n", name);
+ free(region);
+ return NULL;
+ }
+
+ region->buffer = intel_bo_fake_alloc_static(intel->bufmgr,
+ name,
+ region_desc->offset,
+ region->pitch * region->cpp *
+ region->height,
+ region->classic_map);
+
+ /* The sarea just gives us a boolean for whether it's tiled or not,
+ * instead of which tiling mode it is. Guess.
+ */
+ if (region_desc->tiled) {
+ if (IS_965(intel->intelScreen->deviceID) &&
+ region_desc == &intelScreen->depth)
+ region->tiling = I915_TILING_Y;
+ else
+ region->tiling = I915_TILING_X;
+ } else {
+ region->tiling = I915_TILING_NONE;
+ }
+
+ region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE;
}
assert(region->buffer != NULL);
intel->front_region =
intel_recreate_static(intel, "front",
intel->front_region,
- &intelScreen->front,
- DRM_BO_FLAG_MEM_TT);
+ &intelScreen->front);
intel->back_region =
intel_recreate_static(intel, "back",
intel->back_region,
- &intelScreen->back,
- DRM_BO_FLAG_MEM_TT);
-
-#ifdef I915
- if (intelScreen->third.handle) {
- intel->third_region =
- intel_recreate_static(intel, "third",
- intel->third_region,
- &intelScreen->third,
- DRM_BO_FLAG_MEM_TT);
- }
-#endif /* I915 */
+ &intelScreen->back);
/* Still assumes front.cpp == depth.cpp. We can kill this when we move to
* private buffers.
intel->depth_region =
intel_recreate_static(intel, "depth",
intel->depth_region,
- &intelScreen->depth,
- DRM_BO_FLAG_MEM_TT);
+ &intelScreen->depth);
}
projects / mesa.git / blobdiff