#include <sys/ioctl.h>
#include <errno.h>
+#include "main/hash.h"
#include "intel_context.h"
#include "intel_regions.h"
#include "intel_blit.h"
#include "intel_buffer_objects.h"
#include "intel_bufmgr.h"
#include "intel_batchbuffer.h"
-#include "intel_chipset.h"
#define FILE_DEBUG_FLAG DEBUG_REGION
GLubyte *
intel_region_map(struct intel_context *intel, struct intel_region *region)
{
- intelFlush(&intel->ctx);
+ intel_flush(&intel->ctx);
_DBG("%s %p\n", __FUNCTION__, region);
if (!region->map_refcount++) {
if (region->pbo)
intel_region_cow(intel, region);
- if (region->tiling != I915_TILING_NONE &&
- intel->intelScreen->kernel_exec_fencing)
+ if (region->tiling != I915_TILING_NONE)
drm_intel_gem_bo_map_gtt(region->buffer);
else
- dri_bo_map(region->buffer, GL_TRUE);
+ drm_intel_bo_map(region->buffer, GL_TRUE);
region->map = region->buffer->virtual;
}
{
_DBG("%s %p\n", __FUNCTION__, region);
if (!--region->map_refcount) {
- if (region->tiling != I915_TILING_NONE &&
- intel->intelScreen->kernel_exec_fencing)
+ if (region->tiling != I915_TILING_NONE)
drm_intel_gem_bo_unmap_gtt(region->buffer);
else
- dri_bo_unmap(region->buffer);
+ drm_intel_bo_unmap(region->buffer);
region->map = NULL;
}
}
intel_region_alloc_internal(struct intel_context *intel,
GLuint cpp,
GLuint width, GLuint height, GLuint pitch,
- dri_bo *buffer)
+ drm_intel_bo *buffer)
{
struct intel_region *region;
}
region = calloc(sizeof(*region), 1);
+ if (region == NULL)
+ return region;
+
region->cpp = cpp;
region->width = width;
region->height = height;
/* Default to no tiling */
region->tiling = I915_TILING_NONE;
- region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE;
_DBG("%s <-- %p\n", __FUNCTION__, region);
return region;
struct intel_region *
intel_region_alloc(struct intel_context *intel,
uint32_t tiling,
- GLuint cpp, GLuint width, GLuint height, GLuint pitch,
+ GLuint cpp, GLuint width, GLuint height,
GLboolean expect_accelerated_upload)
{
- dri_bo *buffer;
+ drm_intel_bo *buffer;
struct intel_region *region;
+ unsigned long flags = 0;
+ unsigned long aligned_pitch;
- /* If we're tiled, our allocations are in 8 or 32-row blocks, so
- * failure to align our height means that we won't allocate enough pages.
- *
- * If we're untiled, we still have to align to 2 rows high because the
- * data port accesses 2x2 blocks even if the bottom row isn't to be
- * rendered, so failure to align means we could walk off the end of the
- * GTT and fault.
- */
- if (tiling == I915_TILING_X)
- height = ALIGN(height, 8);
- else if (tiling == I915_TILING_Y)
- height = ALIGN(height, 32);
- else
- height = ALIGN(height, 2);
-
- /* If we're untiled, we have to align to 2 rows high because the
- * data port accesses 2x2 blocks even if the bottom row isn't to be
- * rendered, so failure to align means we could walk off the end of the
- * GTT and fault.
- */
- height = ALIGN(height, 2);
-
- if (expect_accelerated_upload) {
- buffer = drm_intel_bo_alloc_for_render(intel->bufmgr, "region",
- pitch * cpp * height, 64);
- } else {
- buffer = drm_intel_bo_alloc(intel->bufmgr, "region",
- pitch * cpp * height, 64);
- }
+ if (expect_accelerated_upload)
+ flags |= BO_ALLOC_FOR_RENDER;
+
+ buffer = drm_intel_bo_alloc_tiled(intel->bufmgr, "region",
+ width, height, cpp,
+ &tiling, &aligned_pitch, flags);
region = intel_region_alloc_internal(intel, cpp, width, height,
- pitch, buffer);
+ aligned_pitch / cpp, buffer);
+ if (region == NULL)
+ return region;
- if (tiling != I915_TILING_NONE) {
- assert(((pitch * cpp) & 127) == 0);
- drm_intel_bo_set_tiling(buffer, &tiling, pitch * cpp);
- drm_intel_bo_get_tiling(buffer, ®ion->tiling, ®ion->bit_6_swizzle);
- }
+ region->tiling = tiling;
return region;
}
GLuint width, GLuint height, GLuint pitch,
GLuint handle, const char *name)
{
- struct intel_region *region;
- dri_bo *buffer;
+ struct intel_region *region, *dummy;
+ drm_intel_bo *buffer;
int ret;
+ uint32_t bit_6_swizzle;
+
+ region = _mesa_HashLookup(intel->intelScreen->named_regions, handle);
+ if (region != NULL) {
+ dummy = NULL;
+ if (region->width != width || region->height != height ||
+ region->cpp != cpp || region->pitch != pitch) {
+ fprintf(stderr,
+ "Region for name %d already exists but is not compatible\n",
+ handle);
+ return NULL;
+ }
+ intel_region_reference(&dummy, region);
+ return dummy;
+ }
buffer = intel_bo_gem_create_from_name(intel->bufmgr, name, handle);
if (region == NULL)
return region;
- ret = dri_bo_get_tiling(region->buffer, ®ion->tiling,
- ®ion->bit_6_swizzle);
+ ret = drm_intel_bo_get_tiling(region->buffer, ®ion->tiling,
+ &bit_6_swizzle);
if (ret != 0) {
fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
handle, name, strerror(-ret));
return NULL;
}
+ region->name = handle;
+ region->screen = intel->intelScreen;
+ _mesa_HashInsert(intel->intelScreen->named_regions, handle, region);
+
return region;
}
if (region->pbo)
region->pbo->region = NULL;
region->pbo = NULL;
- dri_bo_unreference(region->buffer);
+ drm_intel_bo_unreference(region->buffer);
- if (region->classic_map != NULL) {
- drmUnmap(region->classic_map,
- region->pitch * region->cpp * region->height);
- }
+ if (region->name > 0)
+ _mesa_HashRemove(region->screen->named_regions, region->name);
free(region);
}
dst += dst_x * cpp;
src += src_x * cpp;
dst += dst_y * dst_pitch;
- src += src_y * dst_pitch;
+ src += src_y * src_pitch;
width *= cpp;
if (width == dst_pitch && width == src_pitch)
intel_region_cow(intel, dst);
}
- LOCK_HARDWARE(intel);
+ intel_prepare_render(intel);
+
_mesa_copy_rect(intel_region_map(intel, dst) + dst_offset,
dst->cpp,
dst->pitch,
dstx, dsty, width, height, src, src_pitch, srcx, srcy);
intel_region_unmap(intel, dst);
- UNLOCK_HARDWARE(intel);
}
/* Copy rectangular sub-regions. Need better logic about when to
struct intel_region *src,
GLuint src_offset,
GLuint srcx, GLuint srcy, GLuint width, GLuint height,
+ GLboolean flip,
GLenum logicop)
{
+ uint32_t src_pitch = src->pitch;
+
_DBG("%s\n", __FUNCTION__);
if (intel == NULL)
assert(src->cpp == dst->cpp);
+ if (flip)
+ src_pitch = -src_pitch;
+
return intelEmitCopyBlit(intel,
dst->cpp,
- src->pitch, src->buffer, src_offset, src->tiling,
+ src_pitch, src->buffer, src_offset, src->tiling,
dst->pitch, dst->buffer, dst_offset, dst->tiling,
srcx, srcy, dstx, dsty, width, height,
logicop);
struct intel_region *region,
struct intel_buffer_object *pbo)
{
- dri_bo *buffer;
+ drm_intel_bo *buffer;
if (region->pbo == pbo)
return;
}
if (region->buffer) {
- dri_bo_unreference(region->buffer);
+ drm_intel_bo_unreference(region->buffer);
region->buffer = NULL;
}
region->pbo = pbo;
region->pbo->region = region;
- dri_bo_reference(buffer);
+ drm_intel_bo_reference(buffer);
region->buffer = buffer;
+ region->tiling = I915_TILING_NONE;
}
assert(region->buffer == region->pbo->buffer);
region->pbo->region = NULL;
region->pbo = NULL;
- dri_bo_unreference(region->buffer);
+ drm_intel_bo_unreference(region->buffer);
region->buffer = NULL;
- region->buffer = dri_bo_alloc(intel->bufmgr, "region",
- region->pitch * region->cpp * region->height,
- 64);
+ region->buffer = drm_intel_bo_alloc(intel->bufmgr, "region",
+ region->pitch * region->cpp *
+ region->height,
+ 64);
}
/* Break the COW tie to the pbo. Both the pbo and the region end up
/* Now blit from the texture buffer to the new buffer:
*/
- LOCK_HARDWARE(intel);
+ intel_prepare_render(intel);
ok = intelEmitCopyBlit(intel,
region->cpp,
region->pitch, pbo->buffer, 0, region->tiling,
region->pitch, region->height,
GL_COPY);
assert(ok);
- UNLOCK_HARDWARE(intel);
}
-dri_bo *
+drm_intel_bo *
intel_region_buffer(struct intel_context *intel,
struct intel_region *region, GLuint flag)
{
return region->buffer;
}
-
-static struct intel_region *
-intel_recreate_static(struct intel_context *intel,
- const char *name,
- struct intel_region *region,
- intelRegion *region_desc)
-{
- intelScreenPrivate *intelScreen = intel->intelScreen;
- int ret;
-
- if (region == NULL) {
- region = calloc(sizeof(*region), 1);
- region->refcount = 1;
- _DBG("%s creating new region %p\n", __FUNCTION__, region);
- }
- else {
- _DBG("%s %p\n", __FUNCTION__, region);
- }
-
- if (intel->ctx.Visual.rgbBits == 24)
- region->cpp = 4;
- else
- region->cpp = intel->ctx.Visual.rgbBits / 8;
- region->pitch = intelScreen->pitch;
- region->width = intelScreen->width;
- region->height = intelScreen->height;
-
- if (region->buffer != NULL) {
- dri_bo_unreference(region->buffer);
- region->buffer = NULL;
- }
-
- assert(region_desc->bo_handle != -1);
- region->buffer = intel_bo_gem_create_from_name(intel->bufmgr,
- name,
- region_desc->bo_handle);
-
- ret = dri_bo_get_tiling(region->buffer, ®ion->tiling,
- ®ion->bit_6_swizzle);
- if (ret != 0) {
- fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
- region_desc->bo_handle, name, strerror(-ret));
- intel_region_release(®ion);
- return NULL;
- }
-
- assert(region->buffer != NULL);
-
- return region;
-}
-
-/**
- * Create intel_region structs to describe the static front, back, and depth
- * buffers created by the xserver.
- *
- * Although FBO's mean we now no longer use these as render targets in
- * all circumstances, they won't go away until the back and depth
- * buffers become private, and the front buffer will remain even then.
- *
- * Note that these don't allocate video memory, just describe
- * allocations alread made by the X server.
- */
-void
-intel_recreate_static_regions(struct intel_context *intel)
-{
- intelScreenPrivate *intelScreen = intel->intelScreen;
-
- intel->front_region =
- intel_recreate_static(intel, "front",
- intel->front_region,
- &intelScreen->front);
-
- intel->back_region =
- intel_recreate_static(intel, "back",
- intel->back_region,
- &intelScreen->back);
-
- /* Still assumes front.cpp == depth.cpp. We can kill this when we move to
- * private buffers.
- */
- intel->depth_region =
- intel_recreate_static(intel, "depth",
- intel->depth_region,
- &intelScreen->depth);
-}
projects / mesa.git / blobdiff