intel: Expose a minimal number of configs with accumulation buffer

[mesa.git] / src / mesa / drivers / dri / intel / intel_screen.c

diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 5165716e092878ad93cf5b5388ea81527eab67dc..551b97e42a64fb7e57f5e59703adb97dfc047e4a 100644 (file)
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -37,15 +37,11 @@
 #include "intel_buffers.h"
 #include "intel_bufmgr.h"
 #include "intel_chipset.h"
-#include "intel_extensions.h"
 #include "intel_fbo.h"
-#include "intel_regions.h"
 #include "intel_screen.h"
-#include "intel_span.h"
 #include "intel_tex.h"
 
 #include "i915_drm.h"
-#include "i830_dri.h"
 
 #define DRI_CONF_TEXTURE_TILING(def) \
        DRI_CONF_OPT_BEGIN(texture_tiling, bool, def)           \
@@ -113,10 +109,42 @@ static const __DRItexBufferExtension intelTexBufferExtension = {
    intelSetTexBuffer2,
 };
 
+static void
+intelDRI2Flush(__DRIdrawable *drawable)
+{
+   struct intel_context *intel = drawable->driContextPriv->driverPrivate;
+
+   if (intel->gen < 4)
+      INTEL_FIREVERTICES(intel);
+
+   if (intel->batch->map != intel->batch->ptr)
+      intel_batchbuffer_flush(intel->batch);
+}
+
+static void
+intelDRI2FlushInvalidate(__DRIdrawable *drawable)
+{
+   struct intel_context *intel = drawable->driContextPriv->driverPrivate;
+
+   intel->using_dri2_swapbuffers = GL_TRUE;
+
+   intelDRI2Flush(drawable);
+   drawable->validBuffers = GL_FALSE;
+
+   intel_update_renderbuffers(intel->driContext, drawable);
+}
+
+static const struct __DRI2flushExtensionRec intelFlushExtension = {
+    { __DRI2_FLUSH, __DRI2_FLUSH_VERSION },
+    intelDRI2Flush,
+    intelDRI2FlushInvalidate,
+};
+
 static const __DRIextension *intelScreenExtensions[] = {
     &driReadDrawableExtension,
     &intelTexOffsetExtension.base,
     &intelTexBufferExtension.base,
+    &intelFlushExtension.base,
     NULL
 };
 
@@ -174,7 +202,7 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
       if (!fb)
         return GL_FALSE;
 
-      _mesa_initialize_framebuffer(fb, mesaVis);
+      _mesa_initialize_window_framebuffer(fb, mesaVis);
 
       if (mesaVis->redBits == 5)
         rgbFormat = MESA_FORMAT_RGB565;
@@ -311,11 +339,10 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
    intelScreenPrivate *intelScreen;
    GLenum fb_format[3];
    GLenum fb_type[3];
-   /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
-    * support pageflipping at all.
-    */
+
    static const GLenum back_buffer_modes[] = {
-      GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML
+       GLX_NONE, GLX_SWAP_UNDEFINED_OML,
+       GLX_SWAP_EXCHANGE_OML, GLX_SWAP_COPY_OML
    };
    uint8_t depth_bits[4], stencil_bits[4], msaa_samples_array[1];
    int color;
@@ -347,15 +374,6 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
    intelScreen->irq_active = 1;
    psp->extensions = intelScreenExtensions;
 
-   depth_bits[0] = 0;
-   stencil_bits[0] = 0;
-   depth_bits[1] = 16;
-   stencil_bits[1] = 0;
-   depth_bits[2] = 24;
-   stencil_bits[2] = 0;
-   depth_bits[3] = 24;
-   stencil_bits[3] = 8;
-
    msaa_samples_array[0] = 0;
 
    fb_format[0] = GL_RGB;
@@ -370,27 +388,27 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
    depth_bits[0] = 0;
    stencil_bits[0] = 0;
 
+   /* Generate a rich set of useful configs that do not include an
+    * accumulation buffer.
+    */
    for (color = 0; color < ARRAY_SIZE(fb_format); color++) {
       __DRIconfig **new_configs;
       int depth_factor;
 
-      /* With DRI2 right now, GetBuffers always returns a depth/stencil buffer
-       * with the same cpp as the drawable.  So we can't support depth cpp !=
-       * color cpp currently.
+      /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
+       * buffer that has a diffferent number of bits per pixel than the color
+       * buffer.  This isn't yet supported here.
        */
       if (fb_type[color] == GL_UNSIGNED_SHORT_5_6_5) {
         depth_bits[1] = 16;
         stencil_bits[1] = 0;
-
-        depth_factor = 2;
       } else {
         depth_bits[1] = 24;
-        stencil_bits[1] = 0;
-        depth_bits[2] = 24;
-        stencil_bits[2] = 8;
-
-        depth_factor = 3;
+        stencil_bits[1] = 8;
       }
+
+      depth_factor = 2;
+
       new_configs = driCreateConfigs(fb_format[color], fb_type[color],
                                     depth_bits,
                                     stencil_bits,
@@ -398,7 +416,33 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
                                     back_buffer_modes,
                                     ARRAY_SIZE(back_buffer_modes),
                                     msaa_samples_array,
-                                    ARRAY_SIZE(msaa_samples_array));
+                                    ARRAY_SIZE(msaa_samples_array),
+                                    GL_FALSE);
+      if (configs == NULL)
+        configs = new_configs;
+      else
+        configs = driConcatConfigs(configs, new_configs);
+   }
+
+   /* Generate the minimum possible set of configs that include an
+    * accumulation buffer.
+    */
+   for (color = 0; color < ARRAY_SIZE(fb_format); color++) {
+      __DRIconfig **new_configs;
+
+      if (fb_type[color] == GL_UNSIGNED_SHORT_5_6_5) {
+        depth_bits[0] = 16;
+        stencil_bits[0] = 0;
+      } else {
+        depth_bits[0] = 24;
+        stencil_bits[0] = 8;
+      }
+
+      new_configs = driCreateConfigs(fb_format[color], fb_type[color],
+                                    depth_bits, stencil_bits, 1,
+                                    back_buffer_modes + 1, 1,
+                                    msaa_samples_array, 1,
+                                    GL_TRUE);
       if (configs == NULL)
         configs = new_configs;
       else