Merge branch '7.8' into master
[mesa.git] / src / mesa / drivers / dri / intel / intel_screen.c
index 8eed8ee73753482f2f6f50e97db72dc88673d4e7..5e3f40836d04625c56642d2b5c484e779e46a413 100644 (file)
@@ -30,6 +30,7 @@
 #include "main/framebuffer.h"
 #include "main/renderbuffer.h"
 #include "main/hash.h"
+#include "main/fbobject.h"
 
 #include "utils.h"
 #include "xmlpool.h"
 #include "intel_fbo.h"
 #include "intel_screen.h"
 #include "intel_tex.h"
+#include "intel_regions.h"
 
 #include "i915_drm.h"
 
 #define DRI_CONF_TEXTURE_TILING(def) \
-       DRI_CONF_OPT_BEGIN(texture_tiling, bool, def)           \
-               DRI_CONF_DESC(en, "Enable texture tiling")      \
-       DRI_CONF_OPT_END                                        \
 
 PUBLIC const char __driConfigOptions[] =
    DRI_CONF_BEGIN
@@ -63,11 +62,9 @@ PUBLIC const char __driConfigOptions[] =
         DRI_CONF_DESC_END
       DRI_CONF_OPT_END
 
-#ifdef I915
-     DRI_CONF_TEXTURE_TILING(false)
-#else
-     DRI_CONF_TEXTURE_TILING(true)
-#endif
+      DRI_CONF_OPT_BEGIN(texture_tiling, bool, true)
+        DRI_CONF_DESC(en, "Enable texture tiling")
+      DRI_CONF_OPT_END
 
       DRI_CONF_OPT_BEGIN(early_z, bool, false)
         DRI_CONF_DESC(en, "Enable early Z in classic mode (unstable, 945-only).")
@@ -99,11 +96,6 @@ const GLuint __driNConfigOptions = 11;
 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
 #endif /*USE_NEW_INTERFACE */
 
-static const __DRItexOffsetExtension intelTexOffsetExtension = {
-   { __DRI_TEX_OFFSET },
-   intelSetTexOffset,
-};
-
 static const __DRItexBufferExtension intelTexBufferExtension = {
     { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
    intelSetTexBuffer,
@@ -129,7 +121,6 @@ intelDRI2Invalidate(__DRIdrawable *drawable)
 
    intel->using_dri2_swapbuffers = GL_TRUE;
    dri2InvalidateDrawable(drawable);
-   intel_update_renderbuffers(intel->driContext, drawable);
 }
 
 static const struct __DRI2flushExtensionRec intelFlushExtension = {
@@ -138,11 +129,102 @@ static const struct __DRI2flushExtensionRec intelFlushExtension = {
     intelDRI2Invalidate,
 };
 
+static __DRIimage *
+intel_create_image_from_name(__DRIcontext *context,
+                            int width, int height, int format,
+                            int name, int pitch, void *loaderPrivate)
+{
+    __DRIimage *image;
+    struct intel_context *intel = context->driverPrivate;
+    int cpp;
+
+    image = CALLOC(sizeof *image);
+    if (image == NULL)
+       return NULL;
+
+    switch (format) {
+    case __DRI_IMAGE_FORMAT_RGB565:
+       image->format = MESA_FORMAT_RGB565;
+       image->internal_format = GL_RGB;
+       image->data_type = GL_UNSIGNED_BYTE;
+       break;
+    case __DRI_IMAGE_FORMAT_XRGB8888:
+       image->format = MESA_FORMAT_XRGB8888;
+       image->internal_format = GL_RGB;
+       image->data_type = GL_UNSIGNED_BYTE;
+       break;
+    case __DRI_IMAGE_FORMAT_ARGB8888:
+       image->format = MESA_FORMAT_ARGB8888;
+       image->internal_format = GL_RGBA;
+       image->data_type = GL_UNSIGNED_BYTE;
+       break;
+    default:
+       free(image);
+       return NULL;
+    }
+
+    image->data = loaderPrivate;
+    cpp = _mesa_get_format_bytes(image->format);
+
+    image->region = intel_region_alloc_for_handle(intel, cpp, width, height,
+                                                 pitch, name, "image");
+    if (image->region == NULL) {
+       FREE(image);
+       return NULL;
+    }
+
+    return image;      
+}
+
+static __DRIimage *
+intel_create_image_from_renderbuffer(__DRIcontext *context,
+                                    int renderbuffer, void *loaderPrivate)
+{
+   __DRIimage *image;
+   struct intel_context *intel = context->driverPrivate;
+   struct gl_renderbuffer *rb;
+   struct intel_renderbuffer *irb;
+
+   rb = _mesa_lookup_renderbuffer(&intel->ctx, renderbuffer);
+   if (!rb) {
+      _mesa_error(&intel->ctx,
+                 GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
+      return NULL;
+   }
+
+   irb = intel_renderbuffer(rb);
+   image = CALLOC(sizeof *image);
+   if (image == NULL)
+      return NULL;
+
+   image->internal_format = rb->InternalFormat;
+   image->format = rb->Format;
+   image->data_type = rb->DataType;
+   image->data = loaderPrivate;
+   intel_region_reference(&image->region, irb->region);
+
+   return image;
+}
+
+static void
+intel_destroy_image(__DRIimage *image)
+{
+    intel_region_release(&image->region);
+    FREE(image);
+}
+
+static struct __DRIimageExtensionRec intelImageExtension = {
+    { __DRI_IMAGE, __DRI_IMAGE_VERSION },
+    intel_create_image_from_name,
+    intel_create_image_from_renderbuffer,
+    intel_destroy_image,
+};
+
 static const __DRIextension *intelScreenExtensions[] = {
     &driReadDrawableExtension,
-    &intelTexOffsetExtension.base,
     &intelTexBufferExtension.base,
     &intelFlushExtension.base,
+    &intelImageExtension.base,
     NULL
 };
 
@@ -230,18 +312,13 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
       }
 
       if (mesaVis->depthBits == 24) {
-        if (mesaVis->stencilBits == 8) {
-           /* combined depth/stencil buffer */
-           struct intel_renderbuffer *depthStencilRb
-              = intel_create_renderbuffer(MESA_FORMAT_S8_Z24);
-           /* note: bind RB to two attachment points */
-           _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthStencilRb->Base);
-           _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depthStencilRb->Base);
-        } else {
-           struct intel_renderbuffer *depthRb
-              = intel_create_renderbuffer(MESA_FORMAT_X8_Z24);
-           _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
-        }
+        assert(mesaVis->stencilBits == 8);
+        /* combined depth/stencil buffer */
+        struct intel_renderbuffer *depthStencilRb
+           = intel_create_renderbuffer(MESA_FORMAT_S8_Z24);
+        /* note: bind RB to two attachment points */
+        _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthStencilRb->Base);
+        _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depthStencilRb->Base);
       }
       else if (mesaVis->depthBits == 16) {
          /* just 16-bit depth buffer, no hw stencil */
@@ -328,10 +405,13 @@ intel_init_bufmgr(struct intel_screen *intelScreen)
       return GL_FALSE;
    }
 
-   if (intel_get_param(spriv, I915_PARAM_NUM_FENCES_AVAIL, &num_fences))
-      intelScreen->kernel_exec_fencing = !!num_fences;
-   else
-      intelScreen->kernel_exec_fencing = GL_FALSE;
+   if (!intel_get_param(spriv, I915_PARAM_NUM_FENCES_AVAIL, &num_fences) ||
+       num_fences == 0) {
+      fprintf(stderr, "[%s: %u] Kernel 2.6.29 required.\n", __func__, __LINE__);
+      return GL_FALSE;
+   }
+
+   drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr);
 
    intelScreen->named_regions = _mesa_NewHashTable();