Merge remote branch 'origin/7.8'

[mesa.git] / src / mesa / drivers / dri / intel / intel_tex_layout.c

diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.c b/src/mesa/drivers/dri/intel/intel_tex_layout.c
index fcb5cc390682587c36db93ff630d339b71269e30..d132e19e831b72b6270edf8dbe718f753a8f35cf 100644 (file)
--- a/src/mesa/drivers/dri/intel/intel_tex_layout.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_layout.c
@@ -32,42 +32,76 @@
 
 #include "intel_mipmap_tree.h"
 #include "intel_tex_layout.h"
-#include "macros.h"
+#include "intel_context.h"
+#include "main/macros.h"
 
-
-static int align(int value, int alignment)
+void intel_get_texture_alignment_unit(GLenum internalFormat, GLuint *w, GLuint *h)
 {
-   return (value + alignment - 1) & ~(alignment - 1);
+    switch (internalFormat) {
+    case GL_COMPRESSED_RGB_FXT1_3DFX:
+    case GL_COMPRESSED_RGBA_FXT1_3DFX:
+        *w = 8;
+        *h = 4;
+        break;
+
+    case GL_RGB_S3TC:
+    case GL_RGB4_S3TC:
+    case GL_COMPRESSED_RGB_S3TC_DXT1_EXT:
+    case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT:
+    case GL_RGBA_S3TC:
+    case GL_RGBA4_S3TC:
+    case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT:
+    case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT:
+        *w = 4;
+        *h = 4;
+        break;
+
+    default:
+        *w = 4;
+        *h = 2;
+        break;
+    }
 }
 
-void i945_miptree_layout_2d( struct intel_mipmap_tree *mt )
+void i945_miptree_layout_2d( struct intel_context *intel,
+                            struct intel_mipmap_tree *mt,
+                            uint32_t tiling )
 {
-   GLint align_h = 2, align_w = 4;
+   GLuint align_h = 2, align_w = 4;
    GLuint level;
    GLuint x = 0;
    GLuint y = 0;
    GLuint width = mt->width0;
    GLuint height = mt->height0;
 
-   mt->pitch = mt->width0;
+   mt->total_width = mt->width0;
+   intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h);
 
-   /* May need to adjust pitch to accomodate the placement of
+   if (mt->compressed) {
+       mt->total_width = ALIGN(mt->width0, align_w);
+   }
+
+   /* May need to adjust width to accomodate the placement of
     * the 2nd mipmap.  This occurs when the alignment
     * constraints of mipmap placement push the right edge of the
     * 2nd mipmap out past the width of its parent.
     */
    if (mt->first_level != mt->last_level) {
-      GLuint mip1_width = align(minify(mt->width0), align_w)
-                       + minify(minify(mt->width0));
+       GLuint mip1_width;
+
+       if (mt->compressed) {
+           mip1_width = ALIGN(minify(mt->width0), align_w)
+               + ALIGN(minify(minify(mt->width0)), align_w);
+       } else {
+           mip1_width = ALIGN(minify(mt->width0), align_w)
+               + minify(minify(mt->width0));
+       }
 
-      if (mip1_width > mt->width0)
-        mt->pitch = mip1_width;
+       if (mip1_width > mt->total_width) {
+           mt->total_width = mip1_width;
+       }
    }
 
-   /* Pitch must be a whole number of dwords, even though we
-    * express it in texels.
-    */
-   mt->pitch = align(mt->pitch * mt->cpp, 4) / mt->cpp;
    mt->total_height = 0;
 
    for ( level = mt->first_level ; level <= mt->last_level ; level++ ) {
@@ -79,7 +113,7 @@ void i945_miptree_layout_2d( struct intel_mipmap_tree *mt )
       if (mt->compressed)
         img_height = MAX2(1, height/4);
       else
-        img_height = align(height, align_h);
+        img_height = ALIGN(height, align_h);
 
 
       /* Because the images are packed better, the final offset
@@ -90,7 +124,7 @@ void i945_miptree_layout_2d( struct intel_mipmap_tree *mt )
       /* Layout_below: step right after second mipmap.
        */
       if (level == mt->first_level + 1) {
-        x += align(width, align_w);
+        x += ALIGN(width, align_w);
       }
       else {
         y += img_height;