nouveau: reindent nouveau_span.c

[mesa.git] / src / mesa / drivers / dri / nouveau / nouveau_fifo.c

diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fifo.c b/src/mesa/drivers/dri/nouveau/nouveau_fifo.c
index 5c2b2c755230414042fe822fb07e7462684d2aa2..4208819d02577bda1082d5c7c6c7fd856e61d4b0 100644 (file)
--- a/src/mesa/drivers/dri/nouveau/nouveau_fifo.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_fifo.c
@@ -35,6 +35,12 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "nouveau_msg.h"
 #include "nouveau_fifo.h"
 #include "nouveau_lock.h"
+#include "nouveau_object.h"
+#include "nouveau_sync.h"
+
+#ifdef NOUVEAU_RING_DEBUG
+int nouveau_fifo_remaining=0;
+#endif
 
 
 #define RING_SKIPS 8
@@ -68,45 +74,18 @@ void WAIT_RING(nouveauContextPtr nmesa,u_int32_t size)
 }
 
 /* 
- * Wait for the card to be idle 
+ * Wait for the channel to be idle 
  */
 void nouveauWaitForIdleLocked(nouveauContextPtr nmesa)
 {
-       int i,status;
-
+       /* Wait for FIFO idle */
        FIRE_RING();
        while(RING_AHEAD()>0);
 
-       /* We can't wait on PGRAPH going idle..
-        *  1) We don't have the regs mapped
-        *  2) PGRAPH may not go idle with multiple channels active
-        * Look into replacing this with a NOTIFY/NOP + wait notifier sequence.
+       /* Wait on notifier to indicate all commands in the channel have
+        * been completed.
         */
-#if 0
-       for(i=0;i<1000000;i++) /* 1 second */
-       {
-               switch(nmesa->screen->card->type)
-               {
-                       case NV_03:
-                               status=NV_READ(NV03_STATUS);
-                               break;
-                       case NV_04:
-                       case NV_05:
-                       case NV_10:
-                       case NV_20:
-                       case NV_30:
-                       case NV_40:
-                       case NV_44:
-                       case NV_50:
-                       default:
-                               status=NV_READ(NV04_STATUS);
-                               break;
-               }
-               if (status)
-                       return;
-               DO_USLEEP(1);
-       }
-#endif
+       nouveau_notifier_wait_nop(nmesa->glCtx, nmesa->syncNotifier, NvSub3D);
 }
 
 void nouveauWaitForIdle(nouveauContextPtr nmesa)
@@ -119,15 +98,16 @@ void nouveauWaitForIdle(nouveauContextPtr nmesa)
 // here we call the fifo initialization ioctl and fill in stuff accordingly
 GLboolean nouveauFifoInit(nouveauContextPtr nmesa)
 {
-       drm_nouveau_fifo_alloc_t fifo_init;
-       int i;
+       struct drm_nouveau_channel_alloc fifo_init;
+       int i, ret;
 
 #ifdef NOUVEAU_RING_DEBUG
        return GL_TRUE;
 #endif
 
-       int ret;
-       ret=drmCommandWriteRead(nmesa->driFd, DRM_NOUVEAU_FIFO_ALLOC, &fifo_init, sizeof(fifo_init));
+       fifo_init.fb_ctxdma_handle = NvDmaFB;
+       fifo_init.tt_ctxdma_handle = NvDmaTT;
+       ret=drmCommandWriteRead(nmesa->driFd, DRM_NOUVEAU_CHANNEL_ALLOC, &fifo_init, sizeof(fifo_init));
        if (ret) {
                FATAL("Fifo initialization ioctl failed (returned %d)\n",ret);
                return GL_FALSE;
@@ -138,13 +118,23 @@ GLboolean nouveauFifoInit(nouveauContextPtr nmesa)
                FATAL("Unable to map the fifo (returned %d)\n",ret);
                return GL_FALSE;
        }
+
        ret = drmMap(nmesa->driFd, fifo_init.ctrl, fifo_init.ctrl_size, &nmesa->fifo.mmio);
        if (ret) {
                FATAL("Unable to map the control regs (returned %d)\n",ret);
                return GL_FALSE;
        }
 
+       ret = drmMap(nmesa->driFd, fifo_init.notifier,
+                                  fifo_init.notifier_size,
+                                  &nmesa->notifier_block);
+       if (ret) {
+               FATAL("Unable to map the notifier block (returned %d)\n",ret);
+               return GL_FALSE;
+       }
+
        /* Setup our initial FIFO tracking params */
+       nmesa->fifo.channel  = fifo_init.channel;
        nmesa->fifo.put_base = fifo_init.put_base;
        nmesa->fifo.current  = 0;
        nmesa->fifo.put      = 0;