i965: Represent depth surfaces with isl

[mesa.git] / src / mesa / drivers / dri / nouveau / nv04_state_raster.c

diff --git a/src/mesa/drivers/dri/nouveau/nv04_state_raster.c b/src/mesa/drivers/dri/nouveau/nv04_state_raster.c
index 41261195d814e99026b293f408f30210f65655ce..69664fb40ad2fefd9a21a8259ccda15384722c40 100644 (file)
--- a/src/mesa/drivers/dri/nouveau/nv04_state_raster.c
+++ b/src/mesa/drivers/dri/nouveau/nv04_state_raster.c
@@ -123,6 +123,7 @@ void
 nv04_emit_control(struct gl_context *ctx, int emit)
 {
        struct nv04_context *nv04 = to_nv04_context(ctx);
+       struct gl_framebuffer *fb = ctx->DrawBuffer;
        int cull = ctx->Polygon.CullFaceMode;
        int front = ctx->Polygon.FrontFace;
 
@@ -146,9 +147,9 @@ nv04_emit_control(struct gl_context *ctx, int emit)
                                 NV04_TEXTURED_TRIANGLE_CONTROL_CULL_MODE_CCW;
 
        /* Depth test. */
-       if (ctx->Depth.Test)
+       if (ctx->Depth.Test && fb->Visual.depthBits > 0)
                nv04->ctrl[0] |= NV04_TEXTURED_TRIANGLE_CONTROL_Z_ENABLE;
-       if (ctx->Depth.Mask)
+       if (ctx->Depth.Mask && fb->Visual.depthBits > 0)
                nv04->ctrl[0] |= NV04_TEXTURED_TRIANGLE_CONTROL_Z_WRITE;
 
        nv04->ctrl[0] |= get_comparison_op(ctx->Depth.Func) << 16;
@@ -174,7 +175,7 @@ nv04_emit_control(struct gl_context *ctx, int emit)
        if (ctx->Stencil.WriteMask[0])
                nv04->ctrl[0] |= NV04_MULTITEX_TRIANGLE_CONTROL0_STENCIL_WRITE;
 
-       if (ctx->Stencil.Enabled)
+       if (_mesa_stencil_is_enabled(ctx))
                nv04->ctrl[1] |= NV04_MULTITEX_TRIANGLE_CONTROL1_STENCIL_ENABLE;
 
        nv04->ctrl[1] |= get_comparison_op(ctx->Stencil.Function[0]) << 4 |