i965/nir: Do not scalarize phis in non-scalar setups

[mesa.git] / src / mesa / drivers / dri / nouveau / nv10_state_raster.c

diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_raster.c b/src/mesa/drivers/dri/nouveau/nv10_state_raster.c
index da414a0b06b84ac133035b0c8b92d4bc6a90d2a7..ffde87ab27be4b4096fe329b04a7668378f18f7f 100644 (file)
--- a/src/mesa/drivers/dri/nouveau/nv10_state_raster.c
+++ b/src/mesa/drivers/dri/nouveau/nv10_state_raster.c
@@ -97,11 +97,12 @@ void
 nv10_emit_depth(struct gl_context *ctx, int emit)
 {
        struct nouveau_pushbuf *push = context_push(ctx);
+       struct gl_framebuffer *fb = ctx->DrawBuffer;
 
        BEGIN_NV04(push, NV10_3D(DEPTH_TEST_ENABLE), 1);
-       PUSH_DATAb(push, ctx->Depth.Test);
+       PUSH_DATAb(push, ctx->Depth.Test && fb->Visual.depthBits > 0);
        BEGIN_NV04(push, NV10_3D(DEPTH_WRITE_ENABLE), 1);
-       PUSH_DATAb(push, ctx->Depth.Mask);
+       PUSH_DATAb(push, ctx->Depth.Mask && fb->Visual.depthBits > 0);
        BEGIN_NV04(push, NV10_3D(DEPTH_FUNC), 1);
        PUSH_DATA (push, nvgl_comparison_op(ctx->Depth.Func));
 }
@@ -144,7 +145,7 @@ nv10_emit_stencil_func(struct gl_context *ctx, int emit)
        struct nouveau_pushbuf *push = context_push(ctx);
 
        BEGIN_NV04(push, NV10_3D(STENCIL_ENABLE), 1);
-       PUSH_DATAb(push, ctx->Stencil.Enabled);
+       PUSH_DATAb(push, ctx->Stencil._Enabled);
 
        BEGIN_NV04(push, NV10_3D(STENCIL_FUNC_FUNC), 3);
        PUSH_DATA (push, nvgl_comparison_op(ctx->Stencil.Function[0]));