-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h,v 1.24 2002/12/16 16:19:10 dawes Exp $ */
/*
* Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
* Precision Insight, Inc., Cedar Park, Texas, and
#define _R128_H_
#include "dri_util.h"
-#ifndef _SOLO
-#include "xf86str.h"
-
- /* PCI support */
-#include "xf86Pci.h"
-
- /* XAA and Cursor Support */
-#include "xaa.h"
-#include "xf86Cursor.h"
-
- /* DDC support */
-#include "xf86DDC.h"
-
- /* Xv support */
-#include "xf86xv.h"
-
- /* DRI support */
-#ifdef XF86DRI
-#define _XF86DRI_SERVER_
-#include "r128_dripriv.h"
-#include "dri.h"
-#include "GL/glxint.h"
-#endif
-#endif
-#ifdef _SOLO
-#define XF86DRI
-#endif
#define R128_DEBUG 0 /* Turn off debugging output */
#define R128_IDLE_RETRY 32 /* Fall out of idle loops after this count */
typedef struct {
/* Common registers */
- int32_t ovr_clr;
- int32_t ovr_wid_left_right;
- int32_t ovr_wid_top_bottom;
- int32_t ov0_scale_cntl;
- int32_t mpp_tb_config;
- int32_t mpp_gp_config;
- int32_t subpic_cntl;
- int32_t viph_control;
- int32_t i2c_cntl_1;
- int32_t gen_int_cntl;
- int32_t cap0_trig_cntl;
- int32_t cap1_trig_cntl;
- int32_t bus_cntl;
- int32_t config_cntl;
+ uint32_t ovr_clr;
+ uint32_t ovr_wid_left_right;
+ uint32_t ovr_wid_top_bottom;
+ uint32_t ov0_scale_cntl;
+ uint32_t mpp_tb_config;
+ uint32_t mpp_gp_config;
+ uint32_t subpic_cntl;
+ uint32_t viph_control;
+ uint32_t i2c_cntl_1;
+ uint32_t gen_int_cntl;
+ uint32_t cap0_trig_cntl;
+ uint32_t cap1_trig_cntl;
+ uint32_t bus_cntl;
+ uint32_t config_cntl;
/* Other registers to save for VT switches */
- int32_t dp_datatype;
- int32_t gen_reset_cntl;
- int32_t clock_cntl_index;
- int32_t amcgpio_en_reg;
- int32_t amcgpio_mask;
+ uint32_t dp_datatype;
+ uint32_t gen_reset_cntl;
+ uint32_t clock_cntl_index;
+ uint32_t amcgpio_en_reg;
+ uint32_t amcgpio_mask;
/* CRTC registers */
- int32_t crtc_gen_cntl;
- int32_t crtc_ext_cntl;
- int32_t dac_cntl;
- int32_t crtc_h_total_disp;
- int32_t crtc_h_sync_strt_wid;
- int32_t crtc_v_total_disp;
- int32_t crtc_v_sync_strt_wid;
- int32_t crtc_offset;
- int32_t crtc_offset_cntl;
- int32_t crtc_pitch;
+ uint32_t crtc_gen_cntl;
+ uint32_t crtc_ext_cntl;
+ uint32_t dac_cntl;
+ uint32_t crtc_h_total_disp;
+ uint32_t crtc_h_sync_strt_wid;
+ uint32_t crtc_v_total_disp;
+ uint32_t crtc_v_sync_strt_wid;
+ uint32_t crtc_offset;
+ uint32_t crtc_offset_cntl;
+ uint32_t crtc_pitch;
/* CRTC2 registers */
- int32_t crtc2_gen_cntl;
+ uint32_t crtc2_gen_cntl;
/* Flat panel registers */
- int32_t fp_crtc_h_total_disp;
- int32_t fp_crtc_v_total_disp;
- int32_t fp_gen_cntl;
- int32_t fp_h_sync_strt_wid;
- int32_t fp_horz_stretch;
- int32_t fp_panel_cntl;
- int32_t fp_v_sync_strt_wid;
- int32_t fp_vert_stretch;
- int32_t lvds_gen_cntl;
- int32_t tmds_crc;
- int32_t tmds_transmitter_cntl;
+ uint32_t fp_crtc_h_total_disp;
+ uint32_t fp_crtc_v_total_disp;
+ uint32_t fp_gen_cntl;
+ uint32_t fp_h_sync_strt_wid;
+ uint32_t fp_horz_stretch;
+ uint32_t fp_panel_cntl;
+ uint32_t fp_v_sync_strt_wid;
+ uint32_t fp_vert_stretch;
+ uint32_t lvds_gen_cntl;
+ uint32_t tmds_crc;
+ uint32_t tmds_transmitter_cntl;
/* Computed values for PLL */
- int32_t dot_clock_freq;
- int32_t pll_output_freq;
+ uint32_t dot_clock_freq;
+ uint32_t pll_output_freq;
int feedback_div;
int post_div;
/* PLL registers */
- int32_t ppll_ref_div;
- int32_t ppll_div_3;
- int32_t htotal_cntl;
+ uint32_t ppll_ref_div;
+ uint32_t ppll_div_3;
+ uint32_t htotal_cntl;
/* DDA register */
- int32_t dda_config;
- int32_t dda_on_off;
+ uint32_t dda_config;
+ uint32_t dda_on_off;
/* Pallet */
GLboolean palette_valid;
- int32_t palette[256];
+ uint32_t palette[256];
} R128SaveRec, *R128SavePtr;
-#ifndef _SOLO
-typedef struct {
- CARD16 reference_freq;
- CARD16 reference_div;
- int32_t min_pll_freq;
- int32_t max_pll_freq;
- CARD16 xclk;
-} R128PLLRec, *R128PLLPtr;
-
typedef struct {
- int bitsPerPixel;
- int depth;
- int displayWidth;
- int pixel_code;
- int pixel_bytes;
- DisplayModePtr mode;
-} R128FBLayout;
-#endif
-
-typedef struct {
-#ifndef _SOLO
- EntityInfoPtr pEnt;
- pciVideoPtr PciInfo;
- PCITAG PciTag;
-#endif
int Chipset;
GLboolean Primary;
unsigned char *MMIO; /* Map of MMIO region */
unsigned char *FB; /* Map of frame buffer */
- int32_t MemCntl;
- int32_t BusCntl;
+ uint32_t MemCntl;
+ uint32_t BusCntl;
unsigned long FbMapSize; /* Size of frame buffer, in bytes */
int Flags; /* Saved copy of mode flags */
-#ifndef _SOLO
- int8_t BIOSDisplay; /* Device the BIOS is set to display to */
-
- GLboolean HasPanelRegs; /* Current chip can connect to a FP */
- int8_t *VBIOS; /* Video BIOS for mode validation on FPs */
- int FPBIOSstart; /* Start of the flat panel info */
-#endif
/* Computed values for FPs */
int PanelXRes;
int PanelYRes;
int VSyncWidth;
int VBlank;
int PanelPwrDly;
-#ifndef _SOLO
- R128PLLRec pll;
- R128RAMPtr ram;
-
- R128SaveRec SavedReg; /* Original (text) mode */
- R128SaveRec ModeReg; /* Current mode */
- GLboolean (*CloseScreen)(int, ScreenPtr);
- void (*BlockHandler)(int, pointer, pointer, pointer);
-
- GLboolean PaletteSavedOnVT; /* Palette saved on last VT switch */
-
- XAAInfoRecPtr accel;
- GLboolean accelOn;
- xf86CursorInfoPtr cursor;
-#endif
+
unsigned long cursor_start;
unsigned long cursor_end;
/* Computed values for Rage 128 */
int pitch;
int datatype;
- int32_t dp_gui_master_cntl;
+ uint32_t dp_gui_master_cntl;
/* Saved values for ScreenToScreenCopy */
int xdir;
int scanline_y;
int scanline_w;
int scanline_h;
-#ifdef XF86DRI
+
int scanline_hpass;
int scanline_x1clip;
int scanline_x2clip;
int scanline_rop;
int scanline_fg;
int scanline_bg;
-#endif /* XF86DRI */
+
int scanline_words;
int scanline_direct;
int scanline_bpp; /* Only used for ImageWrite */
-#ifndef _SOLO
- DGAModePtr DGAModes;
- int numDGAModes;
- GLboolean DGAactive;
- int DGAViewportStatus;
- DGAFunctionRec DGAFuncs;
-
- R128FBLayout CurrentLayout;
-#endif
-#ifdef XF86DRI
- drmContext drmCtx;
-#ifndef _SOLO
- DRIInfoPtr pDRIInfo;
- int numVisualConfigs;
- __GLXvisualConfig *pVisualConfigs;
- R128ConfigPrivPtr pVisualConfigsPriv;
-#endif
+ drm_context_t drmCtx;
drmSize registerSize;
- drmHandle registerHandle;
+ drm_handle_t registerHandle;
GLboolean IsPCI; /* Current card is a PCI card */
drmSize pciSize;
- drmHandle pciMemHandle;
+ drm_handle_t pciMemHandle;
unsigned char *PCI; /* Map */
GLboolean allowPageFlip; /* Enable 3d page flipping */
int drmMinor;
drmSize agpSize;
- drmHandle agpMemHandle; /* Handle from drmAgpAlloc */
+ drm_handle_t agpMemHandle; /* Handle from drmAgpAlloc */
unsigned long agpOffset;
unsigned char *AGP; /* Map */
int agpMode;
/* CCE ring buffer data */
unsigned long ringStart; /* Offset into AGP space */
- drmHandle ringHandle; /* Handle from drmAddMap */
+ drm_handle_t ringHandle; /* Handle from drmAddMap */
drmSize ringMapSize; /* Size of map */
int ringSize; /* Size of ring (in MB) */
unsigned char *ring; /* Map */
int ringSizeLog2QW;
unsigned long ringReadOffset; /* Offset into AGP space */
- drmHandle ringReadPtrHandle; /* Handle from drmAddMap */
+ drm_handle_t ringReadPtrHandle; /* Handle from drmAddMap */
drmSize ringReadMapSize; /* Size of map */
unsigned char *ringReadPtr; /* Map */
/* CCE vertex/indirect buffer data */
unsigned long bufStart; /* Offset into AGP space */
- drmHandle bufHandle; /* Handle from drmAddMap */
+ drm_handle_t bufHandle; /* Handle from drmAddMap */
drmSize bufMapSize; /* Size of map */
int bufSize; /* Size of buffers (in MB) */
unsigned char *buf; /* Map */
/* CCE AGP Texture data */
unsigned long agpTexStart; /* Offset into AGP space */
- drmHandle agpTexHandle; /* Handle from drmAddMap */
+ drm_handle_t agpTexHandle; /* Handle from drmAddMap */
drmSize agpTexMapSize; /* Size of map */
int agpTexSize; /* Size of AGP tex space (in MB) */
unsigned char *agpTex; /* Map */
int log2TexGran;
/* Saved scissor values */
- int32_t sc_left;
- int32_t sc_right;
- int32_t sc_top;
- int32_t sc_bottom;
+ uint32_t sc_left;
+ uint32_t sc_right;
+ uint32_t sc_top;
+ uint32_t sc_bottom;
- int32_t re_top_left;
- int32_t re_width_height;
+ uint32_t re_top_left;
+ uint32_t re_width_height;
- int32_t aux_sc_cntl;
+ uint32_t aux_sc_cntl;
int irq;
- int32_t gen_int_cntl;
+ uint32_t gen_int_cntl;
GLboolean DMAForXv;
-#endif
-#ifndef _SOLO
- XF86VideoAdaptorPtr adaptor;
- void (*VideoTimerCallback)(ScrnInfoPtr, Time);
- int videoKey;
- GLboolean showCache;
- OptionInfoPtr Options;
-
- GLboolean isDFP;
- GLboolean isPro2;
- I2CBusPtr pI2CBus;
- int32_t DDCReg;
-#endif
} R128InfoRec, *R128InfoPtr;
#define R128WaitForFifo(pScrn, entries) \
#define R128_VERBOSE 0
-#define RING_LOCALS int32_t *__head; int __count;
+#define RING_LOCALS uint32_t *__head; int __count;
#define R128CCE_REFRESH(pScrn, info) \
do { \
fprintf(stderr, \
"ADVANCE_RING() used: %d+%d=%d/%d\n", \
info->indirectBuffer->used - info->indirectStart, \
- __count * sizeof(int32_t), \
+ __count * sizeof(uint32_t), \
info->indirectBuffer->used - info->indirectStart + \
- __count * sizeof(int32_t), \
+ __count * sizeof(uint32_t), \
info->indirectBuffer->total - info->indirectStart ); \
} \
- info->indirectBuffer->used += __count * (int)sizeof(int32_t); \
+ info->indirectBuffer->used += __count * (int)sizeof(uint32_t); \
} while (0)
#define OUT_RING( x ) do { \
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