*
*/
-#include "sarea.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "driver.h"
#include "drm.h"
-#include "sarea.h"
#include "r128.h"
#include "r128_dri.h"
#include "r128_macros.h"
#include "r128_reg.h"
-#include "r128_sarea.h"
#include "r128_version.h"
+#include "r128_drm.h"
-
-/* ?? HACK - for now, put this here... */
-/* ?? Alpha - this may need to be a variable to handle UP1x00 vs TITAN */
-#if defined(__alpha__)
-# define DRM_PAGE_SIZE 8192
-#elif defined(__ia64__)
-# define DRM_PAGE_SIZE getpagesize()
-#else
-# define DRM_PAGE_SIZE 4096
-#endif
-
-/**
- * \brief Establish the set of modes available for the display.
- *
- * \param ctx display handle.
- * \param numModes will receive the number of supported modes.
- * \param modes will point to the list of supported modes.
- *
- * \return one on success, or zero on failure.
- *
- * Allocates a single visual and fills it with information according to the
- * display bit depth. Supports only 16 and 32 bpp bit depths, aborting
- * otherwise.
- */
-const __GLcontextModes __glModes[] = {
-
- /* 32 bit, RGBA Depth=24 Stencil=8 */
- {.rgbMode = GL_TRUE, .colorIndexMode = GL_FALSE, .doubleBufferMode = GL_TRUE, .stereoMode = GL_FALSE,
- .haveAccumBuffer = GL_FALSE, .haveDepthBuffer = GL_TRUE, .haveStencilBuffer = GL_TRUE,
- .redBits = 8, .greenBits = 8, .blueBits = 8, .alphaBits = 8,
- .redMask = 0xff0000, .greenMask = 0xff00, .blueMask = 0xff, .alphaMask = 0xff000000,
- .rgbBits = 32, .indexBits = 0,
- .accumRedBits = 0, .accumGreenBits = 0, .accumBlueBits = 0, .accumAlphaBits = 0,
- .depthBits = 24, .stencilBits = 8,
- .numAuxBuffers= 0, .level = 0, .pixmapMode = GL_FALSE, },
-
- /* 16 bit, RGB Depth=16 */
- {.rgbMode = GL_TRUE, .colorIndexMode = GL_FALSE, .doubleBufferMode = GL_TRUE, .stereoMode = GL_FALSE,
- .haveAccumBuffer = GL_FALSE, .haveDepthBuffer = GL_TRUE, .haveStencilBuffer = GL_FALSE,
- .redBits = 5, .greenBits = 6, .blueBits = 5, .alphaBits = 0,
- .redMask = 0xf800, .greenMask = 0x07e0, .blueMask = 0x001f, .alphaMask = 0x0,
- .rgbBits = 16, .indexBits = 0,
- .accumRedBits = 0, .accumGreenBits = 0, .accumBlueBits = 0, .accumAlphaBits = 0,
- .depthBits = 16, .stencilBits = 0,
- .numAuxBuffers= 0, .level = 0, .pixmapMode = GL_FALSE, },
-};
-static int R128InitContextModes( const DRIDriverContext *ctx,
- int *numModes, const __GLcontextModes **modes)
-{
- *numModes = sizeof(__glModes)/sizeof(__GLcontextModes *);
- *modes = &__glModes[0];
- return 1;
-}
+static size_t r128_drm_page_size;
/* Compute log base 2 of val. */
static int R128MinBits(int val)
/* Initialize the CCE ring buffer data */
info->ringStart = info->agpOffset;
- info->ringMapSize = info->ringSize*1024*1024 + DRM_PAGE_SIZE;
+ info->ringMapSize = info->ringSize*1024*1024 + r128_drm_page_size;
info->ringSizeLog2QW = R128MinBits(info->ringSize*1024*1024/8) - 1;
info->ringReadOffset = info->ringStart + info->ringMapSize;
- info->ringReadMapSize = DRM_PAGE_SIZE;
+ info->ringReadMapSize = r128_drm_page_size;
/* Reserve space for vertex/indirect buffers */
info->bufStart = info->ringReadOffset + info->ringReadMapSize;
{
R128InfoPtr info = ctx->driverPrivate;
unsigned char *R128MMIO = ctx->MMIOAddress;
- CARD32 chunk;
+ u_int32_t chunk;
int ret;
int flags;
/* Initialize the CCE ring buffer data */
info->ringStart = info->agpOffset;
- info->ringMapSize = info->ringSize*1024*1024 + DRM_PAGE_SIZE;
+ info->ringMapSize = info->ringSize*1024*1024 + r128_drm_page_size;
info->ringSizeLog2QW = R128MinBits(info->ringSize*1024*1024/8) - 1;
info->ringReadOffset = info->ringStart + info->ringMapSize;
- info->ringReadMapSize = DRM_PAGE_SIZE;
+ info->ringReadMapSize = r128_drm_page_size;
/* Reserve space for vertex/indirect buffers */
info->bufStart = info->ringReadOffset + info->ringReadMapSize;
static int R128DRIKernelInit(const DRIDriverContext *ctx)
{
R128InfoPtr info = ctx->driverPrivate;
- drmR128Init drmInfo;
+ drm_r128_init_t drmInfo;
- memset( &drmInfo, 0, sizeof(drmR128Init) );
+ memset( &drmInfo, 0, sizeof(&drmInfo) );
- drmInfo.func = DRM_R128_INIT_CCE;
- drmInfo.sarea_priv_offset = sizeof(XF86DRISAREARec);
+ drmInfo.func = R128_INIT_CCE;
+ drmInfo.sarea_priv_offset = sizeof(drm_sarea_t);
drmInfo.is_pci = info->IsPCI;
drmInfo.cce_mode = info->CCEMode;
drmInfo.cce_secure = info->CCESecure;
drmInfo.agp_textures_offset = info->agpTexHandle;
if (drmCommandWrite(ctx->drmFD, DRM_R128_INIT,
- &drmInfo, sizeof(drmR128Init)) < 0)
+ &drmInfo, sizeof(drmInfo)) < 0)
return GL_FALSE;
return GL_TRUE;
static int R128CCEStop(const DRIDriverContext *ctx)
{
R128InfoPtr info = ctx->driverPrivate;
- drmR128CCEStop stop;
+ drm_r128_cce_stop_t stop;
int ret, i;
stop.flush = 1;
stop.idle = 1;
ret = drmCommandWrite( ctx->drmFD, DRM_R128_CCE_STOP,
- &stop, sizeof(drmR128CCEStop) );
+ &stop, sizeof(stop) );
if ( ret == 0 ) {
return 0;
i = 0;
do {
ret = drmCommandWrite( ctx->drmFD, DRM_R128_CCE_STOP,
- &stop, sizeof(drmR128CCEStop) );
+ &stop, sizeof(stop) );
} while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY );
if ( ret == 0 ) {
stop.idle = 0;
if ( drmCommandWrite( ctx->drmFD, DRM_R128_CCE_STOP,
- &stop, sizeof(drmR128CCEStop) )) {
+ &stop, sizeof(stop) )) {
return -errno;
} else {
return 0;
R128DRIPtr pR128DRI;
int err, major, minor, patch;
drmVersionPtr version;
+ drm_r128_sarea_t *pSAREAPriv;
switch (ctx->bpp) {
case 8:
case 32:
break;
}
-
+ r128_drm_page_size = getpagesize();
+
info->registerSize = ctx->MMIOSize;
- ctx->shared.SAREASize = DRM_PAGE_SIZE;
+ ctx->shared.SAREASize = SAREA_MAX;
/* Note that drmOpen will try to load the kernel module, if needed. */
ctx->drmFD = drmOpen("r128", NULL );
/* Need to AddMap the framebuffer and mmio regions here:
*/
if (drmAddMap( ctx->drmFD,
- (drmHandle)ctx->FBStart,
+ (drm_handle_t)ctx->FBStart,
ctx->FBSize,
DRM_FRAME_BUFFER,
0,
0,
info->backPitch * ctx->cpp * ctx->shared.virtualHeight );
- R128SAREAPrivPtr pSAREAPriv;
- pSAREAPriv = (R128SAREAPrivPtr)(((char*)ctx->pSAREA) +
- sizeof(XF86DRISAREARec));
+ pSAREAPriv = (drm_r128_sarea_t *)(((char*)ctx->pSAREA) +
+ sizeof(drm_sarea_t));
memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
/* This is the struct passed to radeon_dri.so for its initialization */
pR128DRI->agpTexMapSize = info->agpTexMapSize;
pR128DRI->log2AGPTexGran = info->log2AGPTexGran;
pR128DRI->agpTexOffset = info->agpTexStart;
- pR128DRI->sarea_priv_offset = sizeof(XF86DRISAREARec);
+ pR128DRI->sarea_priv_offset = sizeof(drm_sarea_t);
return GL_TRUE;
}
void R128DRICloseScreen(const DRIDriverContext *ctx)
{
R128InfoPtr info = ctx->driverPrivate;
- drmR128Init drmInfo;
+ drm_r128_init_t drmInfo;
/* Stop the CCE if it is still in use */
R128CCE_STOP(ctx, info);
}
/* De-allocate all kernel resources */
- memset(&drmInfo, 0, sizeof(drmR128Init));
- drmInfo.func = DRM_R128_CLEANUP_CCE;
+ memset(&drmInfo, 0, sizeof(drmInfo));
+ drmInfo.func = R128_CLEANUP_CCE;
drmCommandWrite(ctx->drmFD, DRM_R128_INIT,
- &drmInfo, sizeof(drmR128Init));
+ &drmInfo, sizeof(drmInfo));
/* De-allocate all AGP resources */
if (info->agpTex) {
* \sa DRIDriverRec.
*/
const struct DRIDriverRec __driDriver = {
- R128InitContextModes,
R128ValidateMode,
R128PostValidateMode,
R128InitFBDev,
projects / mesa.git / blobdiff