-/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_context.h,v 1.2 2002/12/16 16:18:54 dawes Exp $ */
/*
Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
#ifndef __R200_CONTEXT_H__
#define __R200_CONTEXT_H__
-#ifdef GLX_DIRECT_RENDERING
-
#include "tnl/t_vertex.h"
#include "drm.h"
#include "radeon_drm.h"
#include "dri_util.h"
#include "texmem.h"
-#include "macros.h"
-#include "mtypes.h"
-#include "colormac.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
#include "r200_reg.h"
+#include "r200_vertprog.h"
#define ENABLE_HW_3D_TEXTURE 1 /* XXX this is temporary! */
+#ifndef R200_EMIT_VAP_PVS_CNTL
+#error This driver requires a newer libdrm to compile
+#endif
+
+#include "radeon_screen.h"
+#include "common_context.h"
+#include "common_misc.h"
+
struct r200_context;
typedef struct r200_context r200ContextRec;
typedef struct r200_context *r200ContextPtr;
#include "r200_lock.h"
-#include "r200_screen.h"
-#include "mm.h"
-
-/* Flags for software fallback cases */
-/* See correponding strings in r200_swtcl.c */
-#define R200_FALLBACK_TEXTURE 0x1
-#define R200_FALLBACK_DRAW_BUFFER 0x2
-#define R200_FALLBACK_STENCIL 0x4
-#define R200_FALLBACK_RENDER_MODE 0x8
-#define R200_FALLBACK_BLEND_EQ 0x10
-#define R200_FALLBACK_BLEND_FUNC 0x20
-#define R200_FALLBACK_DISABLE 0x40
-#define R200_FALLBACK_BORDER_MODE 0x80
-
-/* The blit width for texture uploads
- */
-#define BLIT_WIDTH_BYTES 1024
-
-/* Use the templated vertex format:
- */
-#define COLOR_IS_RGBA
-#define TAG(x) r200##x
-#include "tnl_dd/t_dd_vertex.h"
-#undef TAG
-
-typedef void (*r200_tri_func)( r200ContextPtr,
- r200Vertex *,
- r200Vertex *,
- r200Vertex * );
-
-typedef void (*r200_line_func)( r200ContextPtr,
- r200Vertex *,
- r200Vertex * );
-
-typedef void (*r200_point_func)( r200ContextPtr,
- r200Vertex * );
-
-
-struct r200_colorbuffer_state {
- GLuint clear;
- GLint drawOffset, drawPitch;
- int roundEnable;
-};
-
-struct r200_depthbuffer_state {
- GLfloat scale;
+#include "main/mm.h"
+
+struct r200_vertex_program {
+ struct gl_vertex_program mesa_program; /* Must be first */
+ int translated;
+ /* need excess instr: 1 for late loop checking, 2 for
+ additional instr due to instr/attr, 3 for fog */
+ VERTEX_SHADER_INSTRUCTION instr[R200_VSF_MAX_INST + 6];
+ int pos_end;
+ int inputs[VERT_ATTRIB_MAX];
+ GLubyte inputmap_rev[16];
+ int native;
+ int fogpidx;
+ int fogmode;
};
-struct r200_pixel_state {
- GLint readOffset, readPitch;
-};
-
-struct r200_scissor_state {
- drm_clip_rect_t rect;
- GLboolean enabled;
-
- GLuint numClipRects; /* Cliprects active */
- GLuint numAllocedClipRects; /* Cliprects available */
- drm_clip_rect_t *pClipRects;
-};
-
-struct r200_stencilbuffer_state {
- GLboolean hwBuffer;
- GLuint clear; /* rb3d_stencilrefmask value */
-};
-
-struct r200_stipple_state {
- GLuint mask[32];
-};
-
-
-
-#define TEX_0 0x1
-#define TEX_1 0x2
-#define TEX_ALL 0x3
-
-typedef struct r200_tex_obj r200TexObj, *r200TexObjPtr;
-
-/* Texture object in locally shared texture space.
- */
-struct r200_tex_obj {
- driTextureObject base;
-
- GLuint bufAddr; /* Offset to start of locally
- shared texture block */
-
- GLuint dirty_state; /* Flags (1 per texunit) for
- whether or not this texobj
- has dirty hardware state
- (pp_*) that needs to be
- brought into the
- texunit. */
-
- drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];
- /* Six, for the cube faces */
-
- GLuint pp_txfilter; /* hardware register values */
- GLuint pp_txformat;
- GLuint pp_txformat_x;
- GLuint pp_txoffset; /* Image location in texmem.
- All cube faces follow. */
- GLuint pp_txsize; /* npot only */
- GLuint pp_txpitch; /* npot only */
- GLuint pp_border_color;
- GLuint pp_cubic_faces; /* cube face 1,2,3,4 log2 sizes */
-
- GLboolean border_fallback;
-};
+#define R200_TEX_ALL 0x3f
struct r200_texture_env_state {
- r200TexObjPtr texobj;
- GLenum format;
- GLenum envMode;
+ radeonTexObjPtr texobj;
+ GLuint outputreg;
+ GLuint unitneeded;
};
-#define R200_MAX_TEXTURE_UNITS 3
+#define R200_MAX_TEXTURE_UNITS 6
struct r200_texture_state {
struct r200_texture_env_state unit[R200_MAX_TEXTURE_UNITS];
};
-struct r200_state_atom {
- struct r200_state_atom *next, *prev;
- const char *name; /* for debug */
- int cmd_size; /* size in bytes */
- GLuint idx;
- int *cmd; /* one or more cmd's */
- int *lastcmd; /* one or more cmd's */
- GLboolean dirty;
- GLboolean (*check)( GLcontext *, int ); /* is this state active? */
-};
-
-
-
/* Trying to keep these relatively short as the variables are becoming
* extravagently long. Drop the driver name prefix off the front of
* everything - I think we know which driver we're in by now, and keep the
#define TEX_PP_TXSIZE 4 /*2c0c*/
#define TEX_PP_TXPITCH 5 /*2c10*/
#define TEX_PP_BORDER_COLOR 6 /*2c14*/
-#define TEX_CMD_1 7
-#define TEX_PP_TXOFFSET 8 /*2d00 */
-#define TEX_STATE_SIZE 9
-
-#define CUBE_CMD_0 0 /* 1 register follows */
-#define CUBE_PP_CUBIC_FACES 1 /* 0x2c18 */
+#define TEX_CMD_1_OLDDRM 7
+#define TEX_PP_TXOFFSET_OLDDRM 8 /*2d00 */
+#define TEX_STATE_SIZE_OLDDRM 9
+#define TEX_PP_CUBIC_FACES 7
+#define TEX_PP_TXMULTI_CTL 8
+#define TEX_CMD_1_NEWDRM 9
+#define TEX_PP_TXOFFSET_NEWDRM 10
+#define TEX_STATE_SIZE_NEWDRM 11
+
+#define CUBE_CMD_0 0 /* 1 register follows */ /* this command unnecessary */
+#define CUBE_PP_CUBIC_FACES 1 /* 0x2c18 */ /* with new enough drm */
#define CUBE_CMD_1 2 /* 5 registers follow */
#define CUBE_PP_CUBIC_OFFSET_F1 3 /* 0x2d04 */
#define CUBE_PP_CUBIC_OFFSET_F2 4 /* 0x2d08 */
#define TF_TFACTOR_5 6
#define TF_STATE_SIZE 7
+#define ATF_CMD_0 0
+#define ATF_TFACTOR_0 1
+#define ATF_TFACTOR_1 2
+#define ATF_TFACTOR_2 3
+#define ATF_TFACTOR_3 4
+#define ATF_TFACTOR_4 5
+#define ATF_TFACTOR_5 6
+#define ATF_TFACTOR_6 7
+#define ATF_TFACTOR_7 8
+#define ATF_STATE_SIZE 9
+
+/* ATI_FRAGMENT_SHADER */
+#define AFS_CMD_0 0
+#define AFS_IC0 1 /* 2f00 */
+#define AFS_IC1 2 /* 2f04 */
+#define AFS_IA0 3 /* 2f08 */
+#define AFS_IA1 4 /* 2f0c */
+#define AFS_STATE_SIZE 33
+
+#define PVS_CMD_0 0
+#define PVS_CNTL_1 1
+#define PVS_CNTL_2 2
+#define PVS_STATE_SIZE 3
+
+/* those are quite big... */
+#define VPI_CMD_0 0
+#define VPI_OPDST_0 1
+#define VPI_SRC0_0 2
+#define VPI_SRC1_0 3
+#define VPI_SRC2_0 4
+#define VPI_OPDST_63 253
+#define VPI_SRC0_63 254
+#define VPI_SRC1_63 255
+#define VPI_SRC2_63 256
+#define VPI_STATE_SIZE 257
+
+#define VPP_CMD_0 0
+#define VPP_PARAM0_0 1
+#define VPP_PARAM1_0 2
+#define VPP_PARAM2_0 3
+#define VPP_PARAM3_0 4
+#define VPP_PARAM0_95 381
+#define VPP_PARAM1_95 382
+#define VPP_PARAM2_95 383
+#define VPP_PARAM3_95 384
+#define VPP_STATE_SIZE 385
+
#define TCL_CMD_0 0
#define TCL_LIGHT_MODEL_CTL_0 1
#define TCL_LIGHT_MODEL_CTL_1 2
#define VTX_STATE_CNTL 8
#define VTX_STATE_SIZE 9
+/* SPR - point sprite state
+ */
+#define SPR_CMD_0 0
+#define SPR_POINT_SPRITE_CNTL 1
+#define SPR_STATE_SIZE 2
+
+#define PTP_CMD_0 0
+#define PTP_VPORT_SCALE_0 1
+#define PTP_VPORT_SCALE_1 2
+#define PTP_VPORT_SCALE_PTSIZE 3
+#define PTP_VPORT_SCALE_3 4
+#define PTP_CMD_1 5
+#define PTP_ATT_CONST_QUAD 6
+#define PTP_ATT_CONST_LIN 7
+#define PTP_ATT_CONST_CON 8
+#define PTP_ATT_CONST_3 9
+#define PTP_EYE_X 10
+#define PTP_EYE_Y 11
+#define PTP_EYE_Z 12
+#define PTP_EYE_3 13
+#define PTP_CLAMP_MIN 14
+#define PTP_CLAMP_MAX 15
+#define PTP_CLAMP_2 16
+#define PTP_CLAMP_3 17
+#define PTP_STATE_SIZE 18
#define VTX_COLOR(v,n) (((v)>>(R200_VTX_COLOR_0_SHIFT+(n)*2))&\
R200_VTX_COLOR_MASK)
#define CST_SE_TCL_INPUT_VTX_3 17
#define CST_STATE_SIZE 18
-
+#define PRF_CMD_0 0
+#define PRF_PP_TRI_PERF 1
+#define PRF_PP_PERF_CNTL 2
+#define PRF_STATE_SIZE 3
struct r200_hw_state {
- /* All state should be on one of these lists:
- */
- struct r200_state_atom dirty; /* dirty list head placeholder */
- struct r200_state_atom clean; /* clean list head placeholder */
+ /* Head of the linked list of state atoms. */
+ struct radeon_state_atom atomlist;
/* Hardware state, stored as cmdbuf commands:
* -- Need to doublebuffer for
* - reviving state after loss of context
* - eliding noop statechange loops? (except line stipple count)
*/
- struct r200_state_atom ctx;
- struct r200_state_atom set;
- struct r200_state_atom vte;
- struct r200_state_atom lin;
- struct r200_state_atom msk;
- struct r200_state_atom vpt;
- struct r200_state_atom vap;
- struct r200_state_atom vtx;
- struct r200_state_atom tcl;
- struct r200_state_atom msl;
- struct r200_state_atom tcg;
- struct r200_state_atom msc;
- struct r200_state_atom cst;
- struct r200_state_atom tam;
- struct r200_state_atom tf;
- struct r200_state_atom tex[2];
- struct r200_state_atom cube[2];
- struct r200_state_atom zbs;
- struct r200_state_atom mtl[2];
- struct r200_state_atom mat[5];
- struct r200_state_atom lit[8]; /* includes vec, scl commands */
- struct r200_state_atom ucp[6];
- struct r200_state_atom pix[6]; /* pixshader stages */
- struct r200_state_atom eye; /* eye pos */
- struct r200_state_atom grd; /* guard band clipping */
- struct r200_state_atom fog;
- struct r200_state_atom glt;
+ struct radeon_state_atom ctx;
+ struct radeon_state_atom set;
+ struct radeon_state_atom vte;
+ struct radeon_state_atom lin;
+ struct radeon_state_atom msk;
+ struct radeon_state_atom vpt;
+ struct radeon_state_atom vap;
+ struct radeon_state_atom vtx;
+ struct radeon_state_atom tcl;
+ struct radeon_state_atom msl;
+ struct radeon_state_atom tcg;
+ struct radeon_state_atom msc;
+ struct radeon_state_atom cst;
+ struct radeon_state_atom tam;
+ struct radeon_state_atom tf;
+ struct radeon_state_atom tex[6];
+ struct radeon_state_atom cube[6];
+ struct radeon_state_atom zbs;
+ struct radeon_state_atom mtl[2];
+ struct radeon_state_atom mat[9];
+ struct radeon_state_atom lit[8]; /* includes vec, scl commands */
+ struct radeon_state_atom ucp[6];
+ struct radeon_state_atom pix[6]; /* pixshader stages */
+ struct radeon_state_atom eye; /* eye pos */
+ struct radeon_state_atom grd; /* guard band clipping */
+ struct radeon_state_atom fog;
+ struct radeon_state_atom glt;
+ struct radeon_state_atom prf;
+ struct radeon_state_atom afs[2];
+ struct radeon_state_atom pvs;
+ struct radeon_state_atom vpi[2];
+ struct radeon_state_atom vpp[2];
+ struct radeon_state_atom atf;
+ struct radeon_state_atom spr;
+ struct radeon_state_atom ptp;
+
+ int max_state_size; /* Number of bytes necessary for a full state emit. */
+ GLboolean is_dirty, all_dirty;
};
struct r200_state {
/* Derived state for internal purposes:
*/
- struct r200_colorbuffer_state color;
- struct r200_depthbuffer_state depth;
- struct r200_pixel_state pixel;
- struct r200_scissor_state scissor;
- struct r200_stencilbuffer_state stencil;
- struct r200_stipple_state stipple;
+ struct radeon_stipple_state stipple;
struct r200_texture_state texture;
+ GLuint envneeded;
};
-/* Need refcounting on dma buffers:
- */
-struct r200_dma_buffer {
- int refcount; /* the number of retained regions in buf */
- drmBufPtr buf;
-};
-
-#define GET_START(rvb) (rmesa->r200Screen->gart_buffer_offset + \
- (rvb)->address - rmesa->dma.buf0_address + \
- (rvb)->start)
-
-/* A retained region, eg vertices for indexed vertices.
- */
-struct r200_dma_region {
- struct r200_dma_buffer *buf;
- char *address; /* == buf->address */
- int start, end, ptr; /* offsets from start of buf */
- int aos_start;
- int aos_stride;
- int aos_size;
-};
-
-
-struct r200_dma {
- /* Active dma region. Allocations for vertices and retained
- * regions come from here. Also used for emitting random vertices,
- * these may be flushed by calling flush_current();
- */
- struct r200_dma_region current;
-
- void (*flush)( r200ContextPtr );
-
- char *buf0_address; /* start of buf[0], for index calcs */
- GLuint nr_released_bufs; /* flush after so many buffers released */
-};
-
-struct r200_dri_mirror {
- __DRIcontextPrivate *context; /* DRI context */
- __DRIscreenPrivate *screen; /* DRI screen */
- __DRIdrawablePrivate *drawable; /* DRI drawable bound to this ctx */
-
- drm_context_t hwContext;
- drm_hw_lock_t *hwLock;
- int fd;
- int drmMinor;
-};
-
-
-#define R200_CMD_BUF_SZ (8*1024)
-
-struct r200_store {
- GLuint statenr;
- GLuint primnr;
- char cmd_buf[R200_CMD_BUF_SZ];
- int cmd_used;
- int elts_start;
-};
-
+#define R200_CMD_BUF_SZ (16*1024)
+#define R200_ELT_BUF_SZ (16*1024)
/* r200_tcl.c
*/
struct r200_tcl_info {
- GLuint vertex_format;
- GLint last_offset;
GLuint hw_primitive;
- struct r200_dma_region *aos_components[8];
+/* hw can handle 12 components max */
+ struct radeon_aos aos[12];
GLuint nr_aos_components;
GLuint *Elts;
- struct r200_dma_region indexed_verts;
- struct r200_dma_region obj;
- struct r200_dma_region rgba;
- struct r200_dma_region spec;
- struct r200_dma_region fog;
- struct r200_dma_region tex[R200_MAX_TEXTURE_UNITS];
- struct r200_dma_region norm;
+ struct radeon_bo *elt_dma_bo;
+ int elt_dma_offset; /** Offset into this buffer object, in bytes */
+ int elt_used;
+
};
/* r200_swtcl.c
*/
struct r200_swtcl_info {
- GLuint RenderIndex;
-
- /**
- * Size of a hardware vertex. This is calculated when \c ::vertex_attrs is
- * installed in the Mesa state vector.
- */
- GLuint vertex_size;
-
- /**
- * Attributes instructing the Mesa TCL pipeline where / how to put vertex
- * data in the hardware buffer.
- */
- struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
-
- /**
- * Number of elements of \c ::vertex_attrs that are actually used.
- */
- GLuint vertex_attr_count;
- /**
- * Cached pointer to the buffer where Mesa will store vertex data.
- */
- GLubyte *verts;
- /* Fallback rasterization functions
- */
- r200_point_func draw_point;
- r200_line_func draw_line;
- r200_tri_func draw_tri;
-
- GLuint hw_primitive;
- GLenum render_primitive;
- GLuint numverts;
+ radeon_point_func draw_point;
+ radeon_line_func draw_line;
+ radeon_tri_func draw_tri;
/**
* Offset of the 4UB color data within a hardware (swtcl) vertex.
* Should Mesa project vertex data or will the hardware do it?
*/
GLboolean needproj;
-
- struct r200_dma_region indexed_verts;
-};
-
-
-struct r200_ioctl {
- GLuint vertex_offset;
- GLuint vertex_size;
-};
-
-
-
-#define R200_MAX_PRIMS 64
-
-
-/* Want to keep a cache of these around. Each is parameterized by
- * only a single value which has only a small range. Only expect a
- * few, so just rescan the list each time?
- */
-struct dynfn {
- struct dynfn *next, *prev;
- int key[2];
- char *code;
-};
-
-struct dfn_lists {
- struct dynfn Vertex2f;
- struct dynfn Vertex2fv;
- struct dynfn Vertex3f;
- struct dynfn Vertex3fv;
- struct dynfn Color4ub;
- struct dynfn Color4ubv;
- struct dynfn Color3ub;
- struct dynfn Color3ubv;
- struct dynfn Color4f;
- struct dynfn Color4fv;
- struct dynfn Color3f;
- struct dynfn Color3fv;
- struct dynfn SecondaryColor3ubEXT;
- struct dynfn SecondaryColor3ubvEXT;
- struct dynfn SecondaryColor3fEXT;
- struct dynfn SecondaryColor3fvEXT;
- struct dynfn Normal3f;
- struct dynfn Normal3fv;
- struct dynfn TexCoord3f;
- struct dynfn TexCoord3fv;
- struct dynfn TexCoord2f;
- struct dynfn TexCoord2fv;
- struct dynfn TexCoord1f;
- struct dynfn TexCoord1fv;
- struct dynfn MultiTexCoord3fARB;
- struct dynfn MultiTexCoord3fvARB;
- struct dynfn MultiTexCoord2fARB;
- struct dynfn MultiTexCoord2fvARB;
- struct dynfn MultiTexCoord1fARB;
- struct dynfn MultiTexCoord1fvARB;
-};
-
-struct dfn_generators {
- struct dynfn *(*Vertex2f)( GLcontext *, const int * );
- struct dynfn *(*Vertex2fv)( GLcontext *, const int * );
- struct dynfn *(*Vertex3f)( GLcontext *, const int * );
- struct dynfn *(*Vertex3fv)( GLcontext *, const int * );
- struct dynfn *(*Color4ub)( GLcontext *, const int * );
- struct dynfn *(*Color4ubv)( GLcontext *, const int * );
- struct dynfn *(*Color3ub)( GLcontext *, const int * );
- struct dynfn *(*Color3ubv)( GLcontext *, const int * );
- struct dynfn *(*Color4f)( GLcontext *, const int * );
- struct dynfn *(*Color4fv)( GLcontext *, const int * );
- struct dynfn *(*Color3f)( GLcontext *, const int * );
- struct dynfn *(*Color3fv)( GLcontext *, const int * );
- struct dynfn *(*SecondaryColor3ubEXT)( GLcontext *, const int * );
- struct dynfn *(*SecondaryColor3ubvEXT)( GLcontext *, const int * );
- struct dynfn *(*SecondaryColor3fEXT)( GLcontext *, const int * );
- struct dynfn *(*SecondaryColor3fvEXT)( GLcontext *, const int * );
- struct dynfn *(*Normal3f)( GLcontext *, const int * );
- struct dynfn *(*Normal3fv)( GLcontext *, const int * );
- struct dynfn *(*TexCoord3f)( GLcontext *, const int * );
- struct dynfn *(*TexCoord3fv)( GLcontext *, const int * );
- struct dynfn *(*TexCoord2f)( GLcontext *, const int * );
- struct dynfn *(*TexCoord2fv)( GLcontext *, const int * );
- struct dynfn *(*TexCoord1f)( GLcontext *, const int * );
- struct dynfn *(*TexCoord1fv)( GLcontext *, const int * );
- struct dynfn *(*MultiTexCoord3fARB)( GLcontext *, const int * );
- struct dynfn *(*MultiTexCoord3fvARB)( GLcontext *, const int * );
- struct dynfn *(*MultiTexCoord2fARB)( GLcontext *, const int * );
- struct dynfn *(*MultiTexCoord2fvARB)( GLcontext *, const int * );
- struct dynfn *(*MultiTexCoord1fARB)( GLcontext *, const int * );
- struct dynfn *(*MultiTexCoord1fvARB)( GLcontext *, const int * );
};
-struct r200_prim {
- GLuint start;
- GLuint end;
- GLuint prim;
-};
-
-struct r200_vbinfo {
- GLint counter, initial_counter;
- GLint *dmaptr;
- void (*notify)( void );
- GLint vertex_size;
- /* A maximum total of 17 elements per vertex: 3 floats for position, 3
+ /* A maximum total of 29 elements per vertex: 3 floats for position, 3
* floats for normal, 4 floats for color, 4 bytes for secondary color,
- * 3 floats for each texture unit (6 floats total).
+ * 3 floats for each texture unit (18 floats total).
*
- * As soon as the 3rd through 6th TMUs are supported, this value will grow.
+ * we maybe need add. 4 to prevent segfault if someone specifies
+ * GL_TEXTURE6/GL_TEXTURE7 (esp. for the codegen-path) (FIXME: )
*
* The position data is never actually stored here, so 3 elements could be
* trimmed out of the buffer.
*/
- union { float f; int i; r200_color_t color; } vertex[17];
-
- GLfloat *normalptr;
- GLfloat *floatcolorptr;
- r200_color_t *colorptr;
- GLfloat *floatspecptr;
- r200_color_t *specptr;
- GLfloat *texcoordptr[2];
-
-
- GLenum *prim; /* &ctx->Driver.CurrentExecPrimitive */
- GLuint primflags;
- GLboolean enabled; /* *_NO_VTXFMT / *_NO_TCL env vars */
- GLboolean installed;
- GLboolean fell_back;
- GLboolean recheck;
- GLint nrverts;
- GLuint vtxfmt_0, vtxfmt_1;
-
- GLuint installed_vertex_format;
- GLuint installed_color_3f_sz;
-
- struct r200_prim primlist[R200_MAX_PRIMS];
- int nrprims;
-
- struct dfn_lists dfn_cache;
- struct dfn_generators codegen;
- GLvertexformat vtxfmt;
-};
-
-
+#define R200_MAX_VERTEX_SIZE ((3*6)+11)
struct r200_context {
- GLcontext *glCtx; /* Mesa context */
+ struct radeon_context radeon;
/* Driver and hardware state management
*/
struct r200_hw_state hw;
struct r200_state state;
-
- /* Texture object bookkeeping
- */
- unsigned nr_heaps;
- driTexHeap * texture_heaps[ R200_NR_TEX_HEAPS ];
- driTextureObject swapped;
- int texture_depth;
- float initialMaxAnisotropy;
-
- /* Rasterization and vertex state:
- */
- GLuint TclFallback;
- GLuint Fallback;
- GLuint NewGLState;
+ struct r200_vertex_program *curr_vp_hw;
/* Vertex buffers
*/
- struct r200_ioctl ioctl;
- struct r200_dma dma;
- struct r200_store store;
-
- /* Page flipping
+ struct radeon_ioctl ioctl;
+ struct radeon_store store;
+ /* A full state emit as of the first state emit in the main store, in case
+ * the context is lost.
*/
- GLuint doPageFlip;
-
- /* Busy waiting
- */
- GLuint do_usleeps;
- GLuint do_irqs;
- GLuint irqsEmitted;
- drm_radeon_irq_wait_t iw;
+ struct radeon_store backup_store;
/* Clientdata textures;
*/
- GLuint prefer_gart_client_texturing;
+ GLuint prefer_gart_client_texturing;
- /* Drawable, cliprect and scissor information
- */
- GLuint numClipRects; /* Cliprects for the draw buffer */
- drm_clip_rect_t *pClipRects;
- unsigned int lastStamp;
- GLboolean lost_context;
- r200ScreenPtr r200Screen; /* Screen private DRI data */
- drm_radeon_sarea_t *sarea; /* Private SAREA data */
+ GLboolean save_on_next_emit;
/* TCL stuff
*/
GLuint TexMatEnabled;
GLuint TexMatCompSel;
GLuint TexGenEnabled;
- GLuint TexGenInputs;
GLuint TexGenCompSel;
GLmatrix tmpmat;
- /* VBI / buffer swap
- */
- GLuint vbl_seq;
- GLuint vblank_flags;
-
- int64_t swap_ust;
- int64_t swap_missed_ust;
-
- GLuint swap_count;
- GLuint swap_missed_count;
-
- PFNGLXGETUSTPROC get_ust;
-
/* r200_tcl.c
*/
struct r200_tcl_info tcl;
*/
struct r200_swtcl_info swtcl;
- /* r200_vtxfmt.c
- */
- struct r200_vbinfo vb;
-
- /* Mirrors of some DRI state
- */
- struct r200_dri_mirror dri;
+ GLboolean using_hyperz;
+ GLboolean texmicrotile;
- /* Configuration cache
- */
- driOptionCache optionCache;
+ struct ati_fragment_shader *afs_loaded;
};
#define R200_CONTEXT(ctx) ((r200ContextPtr)(ctx->DriverCtx))
-static __inline GLuint r200PackColor( GLuint cpp,
- GLubyte r, GLubyte g,
- GLubyte b, GLubyte a )
-{
- switch ( cpp ) {
- case 2:
- return PACK_COLOR_565( r, g, b );
- case 4:
- return PACK_COLOR_8888( a, r, g, b );
- default:
- return 0;
- }
-}
-
-
extern void r200DestroyContext( __DRIcontextPrivate *driContextPriv );
extern GLboolean r200CreateContext( const __GLcontextModes *glVisual,
__DRIcontextPrivate *driContextPriv,
void *sharedContextPrivate);
-extern void r200SwapBuffers( __DRIdrawablePrivate *dPriv );
extern GLboolean r200MakeCurrent( __DRIcontextPrivate *driContextPriv,
__DRIdrawablePrivate *driDrawPriv,
__DRIdrawablePrivate *driReadPriv );
/* ================================================================
* Debugging:
*/
-#define DO_DEBUG 1
-#if DO_DEBUG
-extern int R200_DEBUG;
-#else
-#define R200_DEBUG 0
-#endif
+#define R200_DEBUG RADEON_DEBUG
+
-#define DEBUG_TEXTURE 0x001
-#define DEBUG_STATE 0x002
-#define DEBUG_IOCTL 0x004
-#define DEBUG_PRIMS 0x008
-#define DEBUG_VERTS 0x010
-#define DEBUG_FALLBACKS 0x020
-#define DEBUG_VFMT 0x040
-#define DEBUG_CODEGEN 0x080
-#define DEBUG_VERBOSE 0x100
-#define DEBUG_DRI 0x200
-#define DEBUG_DMA 0x400
-#define DEBUG_SANITY 0x800
-#define DEBUG_SYNC 0x1000
-#define DEBUG_PIXEL 0x2000
-#define DEBUG_MEMORY 0x4000
-#endif
#endif /* __R200_CONTEXT_H__ */