GLuint envneeded;
};
-#define GET_START(rvb) (rmesa->radeon.radeonScreen->gart_buffer_offset + \
- (rvb)->address - rmesa->dma.buf0_address + \
- (rvb)->start)
-
#define R200_CMD_BUF_SZ (16*1024)
#define R200_ELT_BUF_SZ (16*1024)
/* hw can handle 12 components max */
struct radeon_aos aos[12];
- // struct radeon_dma_region *aos_components[12];
GLuint nr_aos_components;
GLuint *Elts;
int elt_dma_offset; /** Offset into this buffer object, in bytes */
int elt_used;
- void (*flush) (r200ContextPtr);
- struct radeon_dma_region vertex_data[15];
};
/* r200_swtcl.c
*/
struct r200_swtcl_info {
- GLuint RenderIndex;
-
- /**
- * Size of a hardware vertex. This is calculated when \c ::vertex_attrs is
- * installed in the Mesa state vector.
- */
- GLuint vertex_size;
-
- /**
- * Attributes instructing the Mesa TCL pipeline where / how to put vertex
- * data in the hardware buffer.
- */
- struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
- /**
- * Number of elements of \c ::vertex_attrs that are actually used.
- */
- GLuint vertex_attr_count;
- /**
- * Cached pointer to the buffer where Mesa will store vertex data.
- */
- GLubyte *verts;
-
- /* Fallback rasterization functions
- */
radeon_point_func draw_point;
radeon_line_func draw_line;
radeon_tri_func draw_tri;
- GLuint hw_primitive;
- GLenum render_primitive;
- GLuint numverts;
-
/**
* Offset of the 4UB color data within a hardware (swtcl) vertex.
*/
* Should Mesa project vertex data or will the hardware do it?
*/
GLboolean needproj;
-
- struct radeon_bo *bo;
- void (*flush) (r200ContextPtr);
};
/* Vertex buffers
*/
struct radeon_ioctl ioctl;
- struct radeon_dma dma;
struct radeon_store store;
/* A full state emit as of the first state emit in the main store, in case
* the context is lost.