Merge remote branch 'origin/mesa_7_6_branch'

[mesa.git] / src / mesa / drivers / dri / r200 / r200_ioctl.c

diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c
index 1ab5a82a4dbaf971a6008017b2b27e94310c0b64..b238adb9721e70ac58d936e65e5c035765200e16 100644 (file)
--- a/src/mesa/drivers/dri/r200/r200_ioctl.c
+++ b/src/mesa/drivers/dri/r200/r200_ioctl.c
@@ -31,7 +31,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  * Authors:
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
- 
+
 #include <sched.h>
 #include <errno.h>
 
@@ -41,6 +41,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/context.h"
 #include "swrast/swrast.h"
 
+
+
 #include "radeon_common.h"
 #include "radeon_lock.h"
 #include "r200_context.h"
@@ -56,41 +58,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define R200_TIMEOUT             512
 #define R200_IDLE_RETRY           16
 
-static void r200UserClear(GLcontext *ctx, GLuint flags)
-{
-  GLuint mask = 0;
-
-  if (flags & RADEON_FRONT)
-    mask |= BUFFER_BIT_FRONT_LEFT;
-
-  if (flags & RADEON_BACK)
-    mask |= BUFFER_BIT_BACK_LEFT;
-
-  if (flags & RADEON_DEPTH)
-    mask |= BUFFER_BIT_DEPTH;
-
-  if (flags & RADEON_STENCIL)
-    mask |= BUFFER_BIT_STENCIL;
-
-#if 1
-  _swrast_Clear(ctx, mask);
-#else
-   if (flags & (RADEON_FRONT | RADEON_BACK)) {
-
-
-   }
-         
-   if ((flags & (RADEON_DEPTH | RADEON_STENCIL))
-       && (flags & RADEON_CLEAR_FASTZ)) {
-
-   }
-#endif
-}
-
 static void r200KernelClear(GLcontext *ctx, GLuint flags)
 {
    r200ContextPtr rmesa = R200_CONTEXT(ctx);
-   __DRIdrawablePrivate *dPriv = rmesa->radeon.dri.drawable;
+   __DRIdrawablePrivate *dPriv = radeon_get_drawable(&rmesa->radeon);
    GLint cx, cy, cw, ch, ret;
    GLuint i;
 
@@ -118,7 +89,7 @@ static void r200KernelClear(GLcontext *ctx, GLuint flags)
       if ( rmesa->radeon.sarea->last_clear - clear <= 25 ) {
         break;
       }
-      
+
       if (rmesa->radeon.do_usleeps) {
         UNLOCK_HARDWARE( &rmesa->radeon );
         DO_USLEEP( 1 );
@@ -214,19 +185,22 @@ static void r200KernelClear(GLcontext *ctx, GLuint flags)
 static void r200Clear( GLcontext *ctx, GLbitfield mask )
 {
    r200ContextPtr rmesa = R200_CONTEXT(ctx);
-   __DRIdrawablePrivate *dPriv = rmesa->radeon.dri.drawable;
+   __DRIdrawablePrivate *dPriv = radeon_get_drawable(&rmesa->radeon);
    GLuint flags = 0;
    GLuint color_mask = 0;
-   GLint ret;
+   GLuint orig_mask = mask;
 
-   if ( R200_DEBUG & DEBUG_IOCTL ) {
-       fprintf( stderr, "r200Clear %x %d\n", mask, rmesa->radeon.sarea->pfCurrentPage);
+   if ( R200_DEBUG & RADEON_IOCTL ) {
+          if (rmesa->radeon.sarea)
+              fprintf( stderr, "r200Clear %x %d\n", mask, rmesa->radeon.sarea->pfCurrentPage);
+          else
+              fprintf( stderr, "r200Clear %x radeon->sarea is NULL\n", mask);
    }
 
    {
       LOCK_HARDWARE( &rmesa->radeon );
       UNLOCK_HARDWARE( &rmesa->radeon );
-      if ( dPriv->numClipRects == 0 ) 
+      if ( dPriv->numClipRects == 0 )
         return;
    }
 
@@ -249,37 +223,36 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask )
       mask &= ~BUFFER_BIT_DEPTH;
    }
 
-   if ( (mask & BUFFER_BIT_STENCIL) && rmesa->radeon.state.stencil.hwBuffer ) {
+   if ( (mask & BUFFER_BIT_STENCIL) ) {
       flags |= RADEON_STENCIL;
       mask &= ~BUFFER_BIT_STENCIL;
    }
 
    if ( mask ) {
-      if (R200_DEBUG & DEBUG_FALLBACKS)
+      if (R200_DEBUG & RADEON_FALLBACKS)
         fprintf(stderr, "%s: swrast clear, mask: %x\n", __FUNCTION__, mask);
       _swrast_Clear( ctx, mask );
    }
 
-   if ( !flags ) 
+   if ( !flags )
       return;
 
    if (rmesa->using_hyperz) {
       flags |= RADEON_USE_COMP_ZBUF;
 /*      if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R200)
         flags |= RADEON_USE_HIERZ; */
-      if (!(rmesa->radeon.state.stencil.hwBuffer) ||
-        ((flags & RADEON_DEPTH) && (flags & RADEON_STENCIL) &&
+      if (!((flags & RADEON_DEPTH) && (flags & RADEON_STENCIL) &&
            ((rmesa->radeon.state.stencil.clear & R200_STENCIL_WRITE_MASK) == R200_STENCIL_WRITE_MASK))) {
          flags |= RADEON_CLEAR_FASTZ;
       }
    }
 
    if (rmesa->radeon.radeonScreen->kernel_mm)
-      r200UserClear(ctx, flags);
-   else
+      radeonUserClear(ctx, orig_mask);
+   else {
       r200KernelClear(ctx, flags);
-
-   rmesa->radeon.hw.all_dirty = GL_TRUE;
+      rmesa->radeon.hw.all_dirty = GL_TRUE;
+   }
 }
 
 /* This version of AllocateMemoryMESA allocates only GART memory, and
@@ -292,7 +265,7 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask )
  * device fd.
  */
 void *r200AllocateMemoryMESA(__DRIscreen *screen, GLsizei size,
-                            GLfloat readfreq, GLfloat writefreq, 
+                            GLfloat readfreq, GLfloat writefreq,
                             GLfloat priority)
 {
    GET_CURRENT_CONTEXT(ctx);
@@ -301,8 +274,8 @@ void *r200AllocateMemoryMESA(__DRIscreen *screen, GLsizei size,
    drm_radeon_mem_alloc_t alloc;
    int ret;
 
-   if (R200_DEBUG & DEBUG_IOCTL)
-      fprintf(stderr, "%s sz %d %f/%f/%f\n", __FUNCTION__, size, readfreq, 
+   if (R200_DEBUG & RADEON_IOCTL)
+      fprintf(stderr, "%s sz %d %f/%f/%f\n", __FUNCTION__, size, readfreq,
              writefreq, priority);
 
    if (!ctx || !(rmesa = R200_CONTEXT(ctx)) || !rmesa->radeon.radeonScreen->gartTextures.map)
@@ -319,12 +292,12 @@ void *r200AllocateMemoryMESA(__DRIscreen *screen, GLsizei size,
    ret = drmCommandWriteRead( rmesa->radeon.radeonScreen->driScreen->fd,
                              DRM_RADEON_ALLOC,
                              &alloc, sizeof(alloc));
-   
+
    if (ret) {
       fprintf(stderr, "%s: DRM_RADEON_ALLOC ret %d\n", __FUNCTION__, ret);
       return NULL;
    }
-   
+
    {
       char *region_start = (char *)rmesa->radeon.radeonScreen->gartTextures.map;
       return (void *)(region_start + region_offset);
@@ -341,7 +314,7 @@ void r200FreeMemoryMESA(__DRIscreen *screen, GLvoid *pointer)
    drm_radeon_mem_free_t memfree;
    int ret;
 
-   if (R200_DEBUG & DEBUG_IOCTL)
+   if (R200_DEBUG & RADEON_IOCTL)
       fprintf(stderr, "%s %p\n", __FUNCTION__, pointer);
 
    if (!ctx || !(rmesa = R200_CONTEXT(ctx)) || !rmesa->radeon.radeonScreen->gartTextures.map) {
@@ -351,7 +324,7 @@ void r200FreeMemoryMESA(__DRIscreen *screen, GLvoid *pointer)
 
    region_offset = (char *)pointer - (char *)rmesa->radeon.radeonScreen->gartTextures.map;
 
-   if (region_offset < 0 || 
+   if (region_offset < 0 ||
        region_offset > rmesa->radeon.radeonScreen->gartTextures.size) {
       fprintf(stderr, "offset %d outside range 0..%d\n", region_offset,
              rmesa->radeon.radeonScreen->gartTextures.size);
@@ -360,12 +333,12 @@ void r200FreeMemoryMESA(__DRIscreen *screen, GLvoid *pointer)
 
    memfree.region = RADEON_MEM_REGION_GART;
    memfree.region_offset = region_offset;
-   
+
    ret = drmCommandWrite( rmesa->radeon.radeonScreen->driScreen->fd,
                          DRM_RADEON_FREE,
                          &memfree, sizeof(memfree));
-   
-   if (ret) 
+
+   if (ret)
       fprintf(stderr, "%s: DRM_RADEON_FREE ret %d\n", __FUNCTION__, ret);
 }
 
@@ -397,9 +370,9 @@ GLboolean r200IsGartMemory( r200ContextPtr rmesa, const GLvoid *pointer,
                offset >= 0 &&
                offset + size < rmesa->radeon.radeonScreen->gartTextures.size);
 
-   if (R200_DEBUG & DEBUG_IOCTL)
+   if (R200_DEBUG & RADEON_IOCTL)
       fprintf(stderr, "r200IsGartMemory( %p ) : %d\n", pointer, valid );
-   
+
    return valid;
 }