radeon/r200/r300: set the texture depth correctly for DRI2

[mesa.git] / src / mesa / drivers / dri / r200 / r200_ioctl.c

diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c
index 0b7f6644573bc5fa62a24bc93a1458ffa41f266d..ccb56202f6d9758811640f5b2605ffae2fedb43f 100644 (file)
--- a/src/mesa/drivers/dri/r200/r200_ioctl.c
+++ b/src/mesa/drivers/dri/r200/r200_ioctl.c
@@ -41,10 +41,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/context.h"
 #include "swrast/swrast.h"
 
-#include "radeon_cs.h"
-#include "r200_context.h"
 
-#include "common_cmdbuf.h"
+
+#include "radeon_common.h"
+#include "radeon_lock.h"
+#include "r200_context.h"
 #include "r200_state.h"
 #include "r200_ioctl.h"
 #include "r200_tcl.h"
@@ -57,46 +58,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define R200_TIMEOUT             512
 #define R200_IDLE_RETRY           16
 
-
-/* At this point we were in FlushCmdBufLocked but we had lost our context, so
- * we need to unwire our current cmdbuf, hook the one with the saved state in
- * it, flush it, and then put the current one back.  This is so commands at the
- * start of a cmdbuf can rely on the state being kept from the previous one.
- */
-static void r200BackUpAndEmitLostStateLocked( r200ContextPtr rmesa )
+static void r200UserClear(GLcontext *ctx, GLuint mask)
 {
-   GLuint nr_released_bufs;
-   struct radeon_store saved_store;
-
-   if (rmesa->backup_store.cmd_used == 0)
-      return;
-
-   if (R200_DEBUG & DEBUG_STATE)
-      fprintf(stderr, "Emitting backup state on lost context\n");
-
-   rmesa->radeon.lost_context = GL_FALSE;
-
-   nr_released_bufs = rmesa->radeon.dma.nr_released_bufs;
-   saved_store = rmesa->store;
-   rmesa->radeon.dma.nr_released_bufs = 0;
-   rmesa->store = rmesa->backup_store;
-   rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ );
-   rmesa->radeon.dma.nr_released_bufs = nr_released_bufs;
-   rmesa->store = saved_store;
-}
-
-static void r200UserClear(GLcontext *ctx, GLuint flags)
-{
-   if (flags & (RADEON_FRONT | RADEON_BACK)) {
-
-
-   }
-         
-   if ((flags & (RADEON_DEPTH | RADEON_STENCIL))
-       && (flags & RADEON_CLEAR_FASTZ)) {
-
-   }
-
+   radeon_clear_tris(ctx, mask);
 }
 
 static void r200KernelClear(GLcontext *ctx, GLuint flags)
@@ -230,9 +194,10 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask )
    GLuint flags = 0;
    GLuint color_mask = 0;
    GLint ret;
+   GLuint orig_mask = mask;
 
    if ( R200_DEBUG & DEBUG_IOCTL ) {
-      fprintf( stderr, "r200Clear\n");
+       fprintf( stderr, "r200Clear %x %d\n", mask, rmesa->radeon.sarea->pfCurrentPage);
    }
 
    {
@@ -242,7 +207,7 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask )
         return;
    }
 
-   r200Flush( ctx );
+   radeonFlush( ctx );
 
    if ( mask & BUFFER_BIT_FRONT_LEFT ) {
       flags |= RADEON_FRONT;
@@ -261,7 +226,7 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask )
       mask &= ~BUFFER_BIT_DEPTH;
    }
 
-   if ( (mask & BUFFER_BIT_STENCIL) && rmesa->radeon.state.stencil.hwBuffer ) {
+   if ( (mask & BUFFER_BIT_STENCIL) ) {
       flags |= RADEON_STENCIL;
       mask &= ~BUFFER_BIT_STENCIL;
    }
@@ -279,48 +244,20 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask )
       flags |= RADEON_USE_COMP_ZBUF;
 /*      if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R200)
         flags |= RADEON_USE_HIERZ; */
-      if (!(rmesa->radeon.state.stencil.hwBuffer) ||
-        ((flags & RADEON_DEPTH) && (flags & RADEON_STENCIL) &&
+      if (!((flags & RADEON_DEPTH) && (flags & RADEON_STENCIL) &&
            ((rmesa->radeon.state.stencil.clear & R200_STENCIL_WRITE_MASK) == R200_STENCIL_WRITE_MASK))) {
          flags |= RADEON_CLEAR_FASTZ;
       }
    }
 
    if (rmesa->radeon.radeonScreen->kernel_mm)
-      r200UserClear(ctx, flags);
+      r200UserClear(ctx, orig_mask);
    else
       r200KernelClear(ctx, flags);
 
-   rmesa->hw.all_dirty = GL_TRUE;
+   rmesa->radeon.hw.all_dirty = GL_TRUE;
 }
 
-
-void r200Flush( GLcontext *ctx )
-{
-   r200ContextPtr rmesa = R200_CONTEXT( ctx );
-
-   if (R200_DEBUG & DEBUG_IOCTL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   if (rmesa->radeon.dma.flush)
-      rmesa->radeon.dma.flush( ctx );
-
-   r200EmitState( rmesa );
-
-   if (rmesa->radeon.cmdbuf.cs->cdw)
-      rcommonFlushCmdBuf( &rmesa->radeon, __FUNCTION__ );
-}
-
-/* Make sure all commands have been sent to the hardware and have
- * completed processing.
- */
-void r200Finish( GLcontext *ctx )
-{
-   r200Flush( ctx );
-   radeon_common_finish(ctx);
-}
-
-
 /* This version of AllocateMemoryMESA allocates only GART memory, and
  * only does so after the point at which the driver has been
  * initialized.
@@ -458,7 +395,7 @@ GLuint r200GartOffsetFromVirtual( r200ContextPtr rmesa, const GLvoid *pointer )
 void r200InitIoctlFuncs( struct dd_function_table *functions )
 {
     functions->Clear = r200Clear;
-    functions->Finish = r200Finish;
-    functions->Flush = r200Flush;
+    functions->Finish = radeonFinish;
+    functions->Flush = radeonFlush;
 }