/*
* Authors:
- * Keith Whitwell <keith@tungstengraphics.com>
+ * Keith Whitwell <keithw@vmware.com>
*/
#ifndef __R200_IOCTL_H__
#define __R200_IOCTL_H__
-#include "main/simple_list.h"
-#include "radeon_dri.h"
+#include "util/simple_list.h"
-#include "radeon_bocs_wrapper.h"
+#include "radeon_bo_gem.h"
+#include "radeon_cs_gem.h"
#include "xf86drm.h"
#include "drm.h"
#include "radeon_drm.h"
+extern void r200EmitMaxVtxIndex(r200ContextPtr rmesa, int count);
extern void r200EmitVertexAOS( r200ContextPtr rmesa,
GLuint vertex_size,
struct radeon_bo *bo,
GLuint primitive,
GLuint vertex_nr );
-extern void r200FlushElts(GLcontext *ctx);
+extern void r200FlushElts(struct gl_context *ctx);
extern GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa,
GLuint primitive,
extern void r200InitIoctlFuncs( struct dd_function_table *functions );
-extern void *r200AllocateMemoryMESA( __DRIscreen *screen, GLsizei size, GLfloat readfreq,
- GLfloat writefreq, GLfloat priority );
-extern void r200FreeMemoryMESA( __DRIscreen *screen, GLvoid *pointer );
-extern GLuint r200GetMemoryOffsetMESA( __DRIscreen *screen, const GLvoid *pointer );
-
-extern GLboolean r200IsGartMemory( r200ContextPtr rmesa, const GLvoid *pointer,
- GLint size );
-
-extern GLuint r200GartOffsetFromVirtual( r200ContextPtr rmesa,
- const GLvoid *pointer );
-
void r200SetUpAtomList( r200ContextPtr rmesa );
/* ================================================================
#define R200_NEWPRIM( rmesa ) \
do { \
if ( rmesa->radeon.dma.flush ) \
- rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); \
+ rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); \
} while (0)
-/* Can accomodate several state changes and primitive changes without
+/* Can accommodate several state changes and primitive changes without
* actually firing the buffer.
*/
#define R200_STATECHANGE( rmesa, ATOM ) \
rmesa->radeon.hw.is_dirty = GL_TRUE; \
} while (0)
+#define R200_SET_STATE( rmesa, ATOM, index, newvalue ) \
+ do { \
+ uint32_t __index = (index); \
+ uint32_t __dword = (newvalue); \
+ if (__dword != (rmesa)->hw.ATOM.cmd[__index]) { \
+ R200_STATECHANGE( (rmesa), ATOM ); \
+ (rmesa)->hw.ATOM.cmd[__index] = __dword; \
+ } \
+ } while(0)
+
#define R200_DB_STATE( ATOM ) \
memcpy( rmesa->hw.ATOM.lastcmd, rmesa->hw.ATOM.cmd, \
rmesa->hw.ATOM.cmd_size * 4)
-static INLINE int R200_DB_STATECHANGE(
+static inline int R200_DB_STATECHANGE(
r200ContextPtr rmesa,
struct radeon_state_atom *atom )
{
* are available, you will also be adding an rmesa->state.max_state_size because
* r200EmitState is called from within r200EmitVbufPrim and r200FlushElts.
*/
-#define AOS_BUFSZ(nr) ((3 + ((nr / 2) * 3) + ((nr & 1) * 2)) * sizeof(int))
-#define VERT_AOS_BUFSZ (5 * sizeof(int))
+#define AOS_BUFSZ(nr) ((3 + ((nr / 2) * 3) + ((nr & 1) * 2) + nr*2))
+#define VERT_AOS_BUFSZ (5)
#define ELTS_BUFSZ(nr) (12 + nr * 2)
-#define VBUF_BUFSZ (3 * sizeof(int))
+#define VBUF_BUFSZ (3)
+#define SCISSOR_BUFSZ (8)
+#define INDEX_BUFSZ (8+2)
static inline uint32_t cmdpacket3(int cmd_type)
{
}
#define OUT_BATCH_PACKET3(packet, num_extra) do { \
- if (!b_l_rmesa->radeonScreen->kernel_mm) { \
- OUT_BATCH(cmdpacket3(RADEON_CMD_PACKET3)); \
- OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
- } else { \
- OUT_BATCH(CP_PACKET2); \
- OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
- } \
+ OUT_BATCH(CP_PACKET2); \
+ OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
} while(0)
#define OUT_BATCH_PACKET3_CLIP(packet, num_extra) do { \
- if (!b_l_rmesa->radeonScreen->kernel_mm) { \
- OUT_BATCH(cmdpacket3(RADEON_CMD_PACKET3_CLIP)); \
- OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
- } else { \
- OUT_BATCH(CP_PACKET2); \
- OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
- } \
+ OUT_BATCH(CP_PACKET2); \
+ OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
} while(0)