Merge commit 'origin/master' into drm-gem
[mesa.git] / src / mesa / drivers / dri / r200 / r200_reg.h
index dab08a9eb730198b18810f59a97f36f293a35c45..5ce287f7a5f9bc7f8e07f33aa9978021860795e4 100644 (file)
@@ -1,4 +1,3 @@
-/* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_reg.h,v 1.2 2002/12/16 16:18:54 dawes Exp $ */
 /*
 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
 
@@ -250,6 +249,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define     R200_ZBIAS_ENABLE_LINE      (1 << 17)
 #define     R200_ZBIAS_ENABLE_TRI       (1 << 18)
 #define     R200_WIDELINE_ENABLE        (1 << 20)
+#define     R200_DISC_FOG_SHADE_SOLID   (0 << 24)
+#define     R200_DISC_FOG_SHADE_FLAT    (1 << 24)
+#define     R200_DISC_FOG_SHADE_GOURAUD (2 << 24)
+#define     R200_DISC_FOG_SHADE_MASK    (3 << 24)
 #define     R200_VTX_PIX_CENTER_D3D     (0 << 27)
 #define     R200_VTX_PIX_CENTER_OGL     (1 << 27)
 #define     R200_ROUND_MODE_TRUNC       (0 << 28)
@@ -659,7 +662,25 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define     R200_CULL_FRONT                     (1<<29)
 #define     R200_CULL_BACK                      (1<<30)
 #define R200_SE_TCL_POINT_SPRITE_CNTL     0x22c4
-#define     R200_POINTSIZE_SEL_STATE            (1<<16)
+#define     R200_PS_MULT_PVATTENCONST           (0<<0)
+#define     R200_PS_MULT_PVATTEN                (1<<0)
+#define     R200_PS_MULT_ATTENCONST             (2<<0)
+#define     R200_PS_MULT_PVCONST                (3<<0)
+#define     R200_PS_MULT_CONST                  (4<<0)
+#define     R200_PS_MULT_MASK                   (7<<0)
+#define     R200_PS_LIN_ATT_ZERO                (1<<3)
+#define     R200_PS_USE_MODEL_EYE_VEC           (1<<4)
+#define     R200_PS_ATT_ALPHA                   (1<<5)
+#define     R200_PS_UCP_MODE_MASK               (3<<6)
+#define     R200_PS_GEN_TEX_0                   (1<<8)
+#define     R200_PS_GEN_TEX_1                   (1<<9)
+#define     R200_PS_GEN_TEX_2                   (1<<10)
+#define     R200_PS_GEN_TEX_3                   (1<<11)
+#define     R200_PS_GEN_TEX_4                   (1<<12)
+#define     R200_PS_GEN_TEX_5                   (1<<13)
+#define     R200_PS_GEN_TEX_0_SHIFT             (8)
+#define     R200_PS_GEN_TEX_MASK                (0x3f<<8)
+#define     R200_PS_SE_SEL_STATE                (1<<16)
 /* gap */
 /* taken from r300, see comments there */
 #define R200_VAP_PVS_CNTL_1                 0x22d0