add support for user-configurable brilinear filtering on r200

[mesa.git] / src / mesa / drivers / dri / r200 / r200_screen.h

diff --git a/src/mesa/drivers/dri/r200/r200_screen.h b/src/mesa/drivers/dri/r200/r200_screen.h
index 3ed4f5502820859521e96c2c140c68151e520a37..91b43cbd7597f49d7632ddc176ef99739b8efe51 100644 (file)
--- a/src/mesa/drivers/dri/r200/r200_screen.h
+++ b/src/mesa/drivers/dri/r200/r200_screen.h
@@ -36,22 +36,23 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef __R200_SCREEN_H__
 #define __R200_SCREEN_H__
 
-#ifdef GLX_DIRECT_RENDERING
-
-#include "dri_util.h"
 #include "xf86drm.h"
-#include "radeon_common.h"
-#include "radeon_sarea.h"
+#include "drm.h"
+#include "radeon_drm.h"
+#include "dri_util.h"
 #include "xmlconfig.h"
 
 typedef struct {
-   drmHandle handle;                   /* Handle to the DRM region */
+   drm_handle_t handle;                        /* Handle to the DRM region */
    drmSize size;                       /* Size of the DRM region */
    drmAddress map;                     /* Mapping of the DRM region */
 } r200RegionRec, *r200RegionPtr;
 
-#define R200_CHIPSET_R200   1
-#define R200_CHIPSET_MOBILITY 2
+
+/* chipset features */
+#define R200_CHIPSET_TCL       (1 << 0)
+#define R200_CHIPSET_REAL_R200  (1 << 1)
+#define R200_CHIPSET_YCBCR_BROKEN (1 << 2) 
 
 
 #define R200_NR_TEX_HEAPS 2
@@ -64,6 +65,7 @@ typedef struct {
    int AGPMode;
    unsigned int irq;                   /* IRQ number (0 means none) */
 
+   unsigned int fbLocation;
    unsigned int frontOffset;
    unsigned int frontPitch;
    unsigned int backOffset;
@@ -84,7 +86,7 @@ typedef struct {
 
    drmBufMapPtr buffers;
 
-   __volatile__ CARD32 *scratch;
+   __volatile__ int32_t *scratch;
 
    __DRIscreenPrivate *driScreen;
    unsigned int sarea_priv_offset;
@@ -93,10 +95,12 @@ typedef struct {
    unsigned int gart_base;
 
    GLboolean drmSupportsCubeMaps;       /* need radeon kernel module >=1.7 */
+   GLboolean drmSupportsBlendColor;     /* need radeon kernel module >= 1.11 */
+   GLboolean drmSupportsTriPerf;        /* need radeon kernel module >= 1.16 */
+   GLboolean depthHasSurface;
 
    /* Configuration cache with default values for all contexts */
    driOptionCache optionCache;
 } r200ScreenRec, *r200ScreenPtr;
 
-#endif
 #endif /* __R200_SCREEN_H__ */