r200: fixup some CS emission sizes

[mesa.git] / src / mesa / drivers / dri / r200 / r200_tex.c

diff --git a/src/mesa/drivers/dri/r200/r200_tex.c b/src/mesa/drivers/dri/r200/r200_tex.c
index 52edf7ed0c1d9be0d113dfa4b905f5415531f40e..c0d1723c77c718ab42735a0bf198d9efeceaaf82 100644 (file)
--- a/src/mesa/drivers/dri/r200/r200_tex.c
+++ b/src/mesa/drivers/dri/r200/r200_tex.c
@@ -43,8 +43,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/teximage.h"
 #include "main/texobj.h"
 
-#include "texmem.h"
-
 #include "radeon_mipmap_tree.h"
 #include "r200_context.h"
 #include "r200_state.h"
@@ -211,6 +209,9 @@ static void r200SetTexFilter( radeonTexObjPtr t, GLenum minf, GLenum magf )
 {
    GLuint anisotropy = (t->pp_txfilter & R200_MAX_ANISO_MASK);
 
+   /* Force revalidation to account for switches from/to mipmapping. */
+   t->validated = GL_FALSE;
+
    t->pp_txfilter &= ~(R200_MIN_FILTER_MASK | R200_MAG_FILTER_MASK);
    t->pp_txformat_x &= ~R200_VOLUME_FILTER_MASK;
 
@@ -389,7 +390,11 @@ static void r200TexParameter( GLcontext *ctx, GLenum target,
        * we just have to rely on loading the right subset of mipmap levels
        * to simulate a clamped LOD.
        */
-      driSwapOutTextureObject( (driTextureObject *) t );
+      if (t->mt) {
+         radeon_miptree_unreference(t->mt);
+        t->mt = 0;
+        t->validated = GL_FALSE;
+      }
       break;
 
    default:
@@ -415,7 +420,7 @@ static void r200DeleteTexture(GLcontext * ctx, struct gl_texture_object *texObj)
    
    if (rmesa) {
       int i;
-      R200_FIREVERTICES(rmesa);
+      radeon_firevertices(&rmesa->radeon);
       for ( i = 0 ; i < rmesa->radeon.glCtx->Const.MaxTextureUnits ; i++ ) {
         if ( t == rmesa->state.texture.unit[i].texobj ) {
            rmesa->state.texture.unit[i].texobj = NULL;