cmd.boxes = (drm_clip_rect_t *)r300->radeon.pClipRects;
}
- if (cmd.nbox) {
- ret = drmCommandWrite(r300->radeon.dri.fd,
- DRM_RADEON_CMDBUF, &cmd, sizeof(cmd));
+ ret = drmCommandWrite(r300->radeon.dri.fd,
+ DRM_RADEON_CMDBUF, &cmd, sizeof(cmd));
- if (RADEON_DEBUG & DEBUG_SYNC) {
- fprintf(stderr, "Syncing in %s\n\n", __FUNCTION__);
- radeonWaitForIdleLocked(&r300->radeon);
- }
- } else {
- ret = 0;
- if (RADEON_DEBUG & DEBUG_IOCTL)
- fprintf(stderr, "%s: No cliprects\n", __FUNCTION__);
+ if (RADEON_DEBUG & DEBUG_SYNC) {
+ fprintf(stderr, "Syncing in %s (from %s)\n\n", __FUNCTION__, caller);
+ radeonWaitForIdleLocked(&r300->radeon);
}
+ r300->dma.nr_released_bufs = 0;
r300->cmdbuf.count_used = 0;
r300->cmdbuf.count_reemit = 0;
}
}
-
/**
* Copy dirty hardware state atoms into the command buffer.
*
if (r300->cmdbuf.count_used && !r300->hw.is_dirty && !r300->hw.all_dirty)
return;
-
+
/* To avoid going across the entire set of states multiple times, just check
* for enough space for the case of emitting all state, and inline the
* r300AllocCmdBuf code here without all the checks.
#define ALLOC_STATE( ATOM, CHK, SZ, NM, IDX ) \
do { \
- r300->hw.ATOM.cmd_size = SZ; \
- r300->hw.ATOM.cmd = (uint32_t*)CALLOC(SZ * sizeof(uint32_t)); \
- r300->hw.ATOM.name = NM; \
- r300->hw.ATOM.idx = IDX; \
+ r300->hw.ATOM.cmd_size = (SZ); \
+ r300->hw.ATOM.cmd = (uint32_t*)CALLOC((SZ) * sizeof(uint32_t)); \
+ r300->hw.ATOM.name = (NM); \
+ r300->hw.ATOM.idx = (IDX); \
r300->hw.ATOM.check = check_##CHK; \
r300->hw.ATOM.dirty = GL_FALSE; \
- r300->hw.max_state_size += SZ; \
+ r300->hw.max_state_size += (SZ); \
} while (0)
void r300InitCmdBuf(r300ContextPtr r300)
{
int size, i, mtu;
-
+
r300->hw.max_state_size = 0;
mtu = r300->radeon.glCtx->Const.MaxTextureUnits;
1 * sizeof(int),
__FUNCTION__);
cmd[0].i = 0;
- cmd[0].wait.cmd_type = RADEON_CMD_WAIT;
+ cmd[0].wait.cmd_type = R300_CMD_WAIT;
cmd[0].wait.flags = flags;
}
}