r300EmitState((r300ContextPtr)rmesa);
}
-extern int cs_write_dword(struct radeon_cs *cs, uint32_t dword);
-
static void r300_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
{
/* please flush pipe do all pending work */
- cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
+ radeon_cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
R300_SC_SCREENDOOR, 1));
- cs_write_dword(cs, 0x0);
- cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
+ radeon_cs_write_dword(cs, 0x0);
+ radeon_cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
R300_SC_SCREENDOOR, 1));
- cs_write_dword(cs, 0x00FFFFFF);
- cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
+ radeon_cs_write_dword(cs, 0x00FFFFFF);
+ radeon_cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
R300_SC_HYPERZ, 1));
- cs_write_dword(cs, 0x0);
- cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
+ radeon_cs_write_dword(cs, 0x0);
+ radeon_cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
R300_US_CONFIG, 1));
- cs_write_dword(cs, 0x0);
- cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
+ radeon_cs_write_dword(cs, 0x0);
+ radeon_cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
R300_ZB_CNTL, 1));
- cs_write_dword(cs, 0x0);
- cs_write_dword(cs, cmdwait(rmesa->radeonScreen, R300_WAIT_3D));
- cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
+ radeon_cs_write_dword(cs, 0x0);
+ radeon_cs_write_dword(cs, cmdwait(rmesa->radeonScreen, R300_WAIT_3D));
+ radeon_cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
R300_RB3D_DSTCACHE_CTLSTAT, 1));
- cs_write_dword(cs, R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
- cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
+ radeon_cs_write_dword(cs, R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
+ radeon_cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
R300_ZB_ZCACHE_CTLSTAT, 1));
- cs_write_dword(cs, R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE);
- cs_write_dword(cs, cmdwait(rmesa->radeonScreen,
+ radeon_cs_write_dword(cs, R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE);
+ radeon_cs_write_dword(cs, cmdwait(rmesa->radeonScreen,
R300_WAIT_3D | R300_WAIT_3D_CLEAN));
}
+static void r300_vtbl_flush_vertices(radeonContextPtr rmesa)
+{
+ R300_FIREVERTICES(((r300ContextPtr)rmesa));
+}
+
static void r300_init_vtbl(radeonContextPtr radeon)
{
radeon->vtbl.get_lock = r300_get_lock;
radeon->vtbl.update_draw_buffer = r300UpdateDrawBuffer;
radeon->vtbl.emit_cs_header = r300_vtbl_emit_cs_header;
radeon->vtbl.emit_state = r300_vtbl_emit_state;
+ radeon->vtbl.flush_vertices = r300_vtbl_flush_vertices;
+ radeon->vtbl.swtcl_flush = r300_swtcl_flush;
}
*/
driParseConfigFiles(&r300->radeon.optionCache, &screen->optionCache,
screen->driScreen->myNum, "r300");
- r300->initialMaxAnisotropy = driQueryOptionf(&r300->radeon.optionCache,
+ r300->radeon.initialMaxAnisotropy = driQueryOptionf(&r300->radeon.optionCache,
"def_max_anisotropy");
/* Init default driver functions then plug in our R300-specific functions
}
/* Init r300 context data */
- r300->texture_depth = driQueryOptioni(&r300->radeon.optionCache,
+ r300->radeon.texture_depth = driQueryOptioni(&r300->radeon.optionCache,
"texture_depth");
- if (r300->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
- r300->texture_depth = (screen->cpp == 4) ?
+ if (r300->radeon.texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
+ r300->radeon.texture_depth = (screen->cpp == 4) ?
DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
/* Set the maximum texture size small enough that we can guarentee that
driQueryOptionb(&r300->radeon.optionCache,
"disable_lowimpact_fallback");
- radeonInitSpanFuncs(ctx);
r300InitCmdBuf(r300);
r300InitState(r300);
if (!(screen->chip_flags & RADEON_CHIPSET_TCL))