r300: further cleanup

[mesa.git] / src / mesa / drivers / dri / r300 / r300_context.h

diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h
index 1c7bfc819bd58655f10afcb8e27bf5740c150c70..ad8b5a2ae4550213712c65b42bb474c05a129610 100644 (file)
--- a/src/mesa/drivers/dri/r300/r300_context.h
+++ b/src/mesa/drivers/dri/r300/r300_context.h
@@ -116,9 +116,11 @@ typedef struct r300_context *r300ContextPtr;
 #define R300_GB_MISC_MSPOS_0           1
 #define R300_GB_MISC_MSPOS_1           2
 #define R300_GB_MISC_TILE_CONFIG       3
-#define R300_GB_MISC_SELECT            4
-#define R300_GB_MISC_AA_CONFIG         5
-#define R300_GB_MISC_CMDSIZE           6
+#define R300_GB_MISC_CMDSIZE           4
+#define R300_GB_MISC2_CMD_0                0
+#define R300_GB_MISC2_SELECT           1
+#define R300_GB_MISC2_AA_CONFIG                2
+#define R300_GB_MISC2_CMDSIZE          3
 
 #define R300_TXE_CMD_0         0
 #define R300_TXE_ENABLE                1
@@ -307,6 +309,7 @@ struct r300_hw_state {
        struct radeon_state_atom pvs;   /* pvs_cntl (22D0) */
        struct radeon_state_atom gb_enable;     /* (4008) */
        struct radeon_state_atom gb_misc;       /* Multisampling position shifts ? (4010) */
+       struct radeon_state_atom gb_misc2;      /* Multisampling position shifts ? (4010) */
        struct radeon_state_atom ga_point_s0;   /* S Texture Coordinate of Vertex 0 for Point texture stuffing (LLC) (4200) */
        struct radeon_state_atom ga_triangle_stipple;   /* (4214) */
        struct radeon_state_atom ps;    /* pointsize (421C) */
@@ -314,6 +317,7 @@ struct r300_hw_state {
        struct radeon_state_atom lcntl; /* line control */
        struct radeon_state_atom ga_line_stipple;       /* (4260) */
        struct radeon_state_atom shade;
+       struct radeon_state_atom shade2;
        struct radeon_state_atom polygon_mode;
        struct radeon_state_atom fogp;  /* fog parameters (4294) */
        struct radeon_state_atom ga_soft_reset; /* (429C) */
@@ -351,7 +355,7 @@ struct r300_hw_state {
        struct radeon_state_atom zstencil_format;
        struct radeon_state_atom zb;    /* z buffer (4F20) */
        struct radeon_state_atom zb_depthclearvalue;    /* (4F28) */
-       struct radeon_state_atom unk4F30;       /* (4F30) */
+       struct radeon_state_atom zb_zmask;      /* (4F30) */
        struct radeon_state_atom zb_hiz_offset; /* (4F44) */
        struct radeon_state_atom zb_hiz_pitch;  /* (4F54) */
 
@@ -408,8 +412,6 @@ struct r300_vertex_shader_state {
        struct r300_vertex_shader_fragment program;
 };
 
-extern int hw_tcl_on;
-
 #define COLOR_IS_RGBA
 #define TAG(x) r300##x
 #include "tnl_dd/t_dd_vertex.h"
@@ -450,11 +452,15 @@ struct r300_vertex_program_cont {
        struct r300_vertex_program *progs;
 };
 
-#define PFS_MAX_ALU_INST       64
-#define PFS_MAX_TEX_INST       64
-#define PFS_MAX_TEX_INDIRECT 4
-#define PFS_NUM_TEMP_REGS      32
-#define PFS_NUM_CONST_REGS     16
+#define R300_PFS_MAX_ALU_INST  64
+#define R300_PFS_MAX_TEX_INST  32
+#define R300_PFS_MAX_TEX_INDIRECT 4
+#define R300_PFS_NUM_TEMP_REGS 32
+#define R300_PFS_NUM_CONST_REGS        32
+
+#define R500_PFS_MAX_INST 512
+#define R500_PFS_NUM_TEMP_REGS 128
+#define R500_PFS_NUM_CONST_REGS 256
 
 struct r300_pfs_compile_state;
 struct r500_pfs_compile_state;
@@ -500,7 +506,7 @@ struct r300_fragment_program_node {
 struct r300_fragment_program_code {
        struct {
                int length; /**< total # of texture instructions used */
-               GLuint inst[PFS_MAX_TEX_INST];
+               GLuint inst[R300_PFS_MAX_TEX_INST];
        } tex;
 
        struct {
@@ -510,7 +516,7 @@ struct r300_fragment_program_code {
                        GLuint inst1;
                        GLuint inst2;
                        GLuint inst3;
-               } inst[PFS_MAX_ALU_INST];
+               } inst[R300_PFS_MAX_ALU_INST];
        } alu;
 
        struct r300_fragment_program_node node[4];
@@ -521,7 +527,7 @@ struct r300_fragment_program_code {
         * Remember which program register a given hardware constant
         * belongs to.
         */
-       struct prog_src_register constant[PFS_NUM_CONST_REGS];
+       struct prog_src_register constant[R300_PFS_NUM_CONST_REGS];
        int const_nr;
 
        int max_temp_idx;
@@ -536,7 +542,7 @@ struct r500_fragment_program_code {
                GLuint inst3;
                GLuint inst4;
                GLuint inst5;
-       } inst[512];
+       } inst[R500_PFS_MAX_INST];
 
        int inst_offset;
        int inst_end;
@@ -545,7 +551,7 @@ struct r500_fragment_program_code {
         * Remember which program register a given hardware constant
         * belongs to.
         */
-       struct prog_src_register constant[PFS_NUM_CONST_REGS];
+       struct prog_src_register constant[R500_PFS_NUM_CONST_REGS];
        int const_nr;
 
        int max_temp_idx;
@@ -640,6 +646,14 @@ struct r300_context {
 
        GLboolean disable_lowimpact_fallback;
 
+       struct r300_options {
+               uint32_t conformance_mode:1;
+               uint32_t hw_tcl_enabled:1;
+               uint32_t s3tc_force_enabled:1;
+               uint32_t s3tc_force_disabled:1;
+               uint32_t stencil_two_side_disabled:1;
+       } options;
+       
        struct r300_swtcl_info swtcl;
        GLboolean vap_flush_needed;