}
}
-static GLuint r300VAPInputRoute0(uint32_t * dst, GLvector4f ** attribptr,
+#define DW_SIZE(x) ((inputs[tab[(x)]] << R300_DST_VEC_LOC_SHIFT) | \
+ (attribptr[tab[(x)]]->size - 1) << R300_DATA_TYPE_0_SHIFT)
+
+GLuint r300VAPInputRoute0(uint32_t * dst, GLvector4f ** attribptr,
int *inputs, GLint * tab, GLuint nr)
{
GLuint i, dw;
- /* dw: size, inputs, stop bit, type */
- for (i = 0; i + 1 < nr; i += 2) {
- dw = (attribptr[tab[i]]->size - 1) | (inputs[tab[i]] << 8) | R300_INPUT_ROUTE_FLOAT;
- dw |= ((attribptr[tab[i + 1]]->size - 1) | (inputs[tab[i + 1]] << 8) | R300_INPUT_ROUTE_FLOAT) << 16;
- if (i + 2 == nr) {
- dw |= (1 << (13 + 16));
+ /* type, inputs, stop bit, size */
+ for (i = 0; i < nr; i += 2) {
+ /* make sure input is valid, would lockup the gpu */
+ assert(inputs[tab[i]] != -1);
+ dw = (R300_SIGNED | DW_SIZE(i));
+ if (i + 1 == nr) {
+ dw |= R300_LAST_VEC << R300_DATA_TYPE_0_SHIFT;
+ } else {
+ assert(inputs[tab[i + 1]] != -1);
+ dw |= (R300_SIGNED |
+ DW_SIZE(i + 1)) << R300_DATA_TYPE_1_SHIFT;
+ if (i + 2 == nr) {
+ dw |= R300_LAST_VEC << R300_DATA_TYPE_1_SHIFT;
+ }
}
dst[i >> 1] = dw;
}
- if (nr & 1) {
- dw = (attribptr[tab[nr - 1]]->size - 1) | (inputs[tab[nr - 1]] << 8) | R300_INPUT_ROUTE_FLOAT;
- dw |= 1 << 13;
- dst[nr >> 1] = dw;
- }
-
return (nr + 1) >> 1;
}
static GLuint r300VAPInputRoute1Swizzle(int swizzle[4])
{
- return (swizzle[0] << R300_INPUT_ROUTE_X_SHIFT) |
- (swizzle[1] << R300_INPUT_ROUTE_Y_SHIFT) |
- (swizzle[2] << R300_INPUT_ROUTE_Z_SHIFT) |
- (swizzle[3] << R300_INPUT_ROUTE_W_SHIFT);
+ return (swizzle[0] << R300_SWIZZLE_SELECT_X_SHIFT) |
+ (swizzle[1] << R300_SWIZZLE_SELECT_Y_SHIFT) |
+ (swizzle[2] << R300_SWIZZLE_SELECT_Z_SHIFT) |
+ (swizzle[3] << R300_SWIZZLE_SELECT_W_SHIFT);
}
-static GLuint r300VAPInputRoute1(uint32_t * dst, int swizzle[][4], GLuint nr)
+GLuint r300VAPInputRoute1(uint32_t * dst, int swizzle[][4], GLuint nr)
{
- GLuint i;
-
- for (i = 0; i + 1 < nr; i += 2) {
- dst[i >> 1] = r300VAPInputRoute1Swizzle(swizzle[i]) | R300_INPUT_ROUTE_ENABLE;
- dst[i >> 1] |= (r300VAPInputRoute1Swizzle(swizzle[i + 1]) | R300_INPUT_ROUTE_ENABLE) << 16;
- }
+ GLuint i, dw;
- if (nr & 1) {
- dst[nr >> 1] = r300VAPInputRoute1Swizzle(swizzle[nr - 1]) | R300_INPUT_ROUTE_ENABLE;
+ for (i = 0; i < nr; i += 2) {
+ dw = (r300VAPInputRoute1Swizzle(swizzle[i]) |
+ ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y |
+ R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE0_SHIFT;
+ if (i + 1 < nr) {
+ dw |= (r300VAPInputRoute1Swizzle(swizzle[i + 1]) |
+ ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y |
+ R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE1_SHIFT;
+ }
+ dst[i >> 1] = dw;
}
return (nr + 1) >> 1;
}
-static GLuint r300VAPInputCntl0(GLcontext * ctx, GLuint InputsRead)
+GLuint r300VAPInputCntl0(GLcontext * ctx, GLuint InputsRead)
{
- /* Hard coded value, no idea what it means */
+ /* No idea what this value means. I have seen other values written to
+ * this register... */
return 0x5555;
}
-static GLuint r300VAPInputCntl1(GLcontext * ctx, GLuint InputsRead)
+GLuint r300VAPInputCntl1(GLcontext * ctx, GLuint InputsRead)
{
r300ContextPtr rmesa = R300_CONTEXT(ctx);
GLuint i, vic_1 = 0;
return vic_1;
}
-static GLuint r300VAPOutputCntl0(GLcontext * ctx, GLuint OutputsWritten)
+GLuint r300VAPOutputCntl0(GLcontext * ctx, GLuint OutputsWritten)
{
GLuint ret = 0;
ret |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT;
if (OutputsWritten & (1 << VERT_RESULT_COL0))
- ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT;
+ ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT;
if (OutputsWritten & (1 << VERT_RESULT_COL1))
ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT;
-#if 0
- if (OutputsWritten & (1 << VERT_RESULT_BFC0))
- ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT;
-
- if (OutputsWritten & (1 << VERT_RESULT_BFC1))
- ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT;
+ if (OutputsWritten & (1 << VERT_RESULT_BFC0)
+ || OutputsWritten & (1 << VERT_RESULT_BFC1))
+ ret |=
+ R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT |
+ R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT |
+ R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT;
+#if 0
if (OutputsWritten & (1 << VERT_RESULT_FOGC)) ;
#endif
return ret;
}
-static GLuint r300VAPOutputCntl1(GLcontext * ctx, GLuint OutputsWritten)
+GLuint r300VAPOutputCntl1(GLcontext * ctx, GLuint OutputsWritten)
{
GLuint i, ret = 0;
DECLARE_RENDERINPUTS(render_inputs_bitset);
RENDERINPUTS_COPY(render_inputs_bitset, tnl->render_inputs_bitset);
+ vb->AttribPtr[VERT_ATTRIB_POS] = vb->ClipPtr;
+
assert(RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_POS));
assert(RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_NORMAL) == 0);
- assert(RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_COLOR0));
+ //assert(RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_COLOR0));
if (RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_POS)) {
InputsRead |= 1 << VERT_ATTRIB_POS;
}
}
- if (!(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
- /* Fixed, apply to vir0 only */
- memcpy(vir_inputs, inputs, VERT_ATTRIB_MAX * sizeof(int));
- inputs = vir_inputs;
- if (InputsRead & VERT_ATTRIB_POS)
- inputs[VERT_ATTRIB_POS] = 0;
- if (InputsRead & (1 << VERT_ATTRIB_COLOR0))
- inputs[VERT_ATTRIB_COLOR0] = 2;
- if (InputsRead & (1 << VERT_ATTRIB_COLOR1))
- inputs[VERT_ATTRIB_COLOR1] = 3;
- for (i = VERT_ATTRIB_TEX0; i <= VERT_ATTRIB_TEX7; i++)
- if (InputsRead & (1 << i))
- inputs[i] = 6 + (i - VERT_ATTRIB_TEX0);
- }
+ /* Fixed, apply to vir0 only */
+ memcpy(vir_inputs, inputs, VERT_ATTRIB_MAX * sizeof(int));
+ inputs = vir_inputs;
+ if (InputsRead & VERT_ATTRIB_POS)
+ inputs[VERT_ATTRIB_POS] = 0;
+ if (InputsRead & (1 << VERT_ATTRIB_COLOR0))
+ inputs[VERT_ATTRIB_COLOR0] = 2;
+ if (InputsRead & (1 << VERT_ATTRIB_COLOR1))
+ inputs[VERT_ATTRIB_COLOR1] = 3;
+ for (i = VERT_ATTRIB_TEX0; i <= VERT_ATTRIB_TEX7; i++)
+ if (InputsRead & (1 << i))
+ inputs[i] = 6 + (i - VERT_ATTRIB_TEX0);
RENDERINPUTS_COPY(rmesa->state.render_inputs_bitset, render_inputs_bitset);
}
((drm_r300_cmd_header_t *) rmesa->hw.vir[0].cmd)->packet0.count =
r300VAPInputRoute0(&rmesa->hw.vir[0].cmd[R300_VIR_CNTL_0],
vb->AttribPtr, inputs, tab, nr);
-
R300_STATECHANGE(rmesa, vir[1]);
((drm_r300_cmd_header_t *) rmesa->hw.vir[1].cmd)->packet0.count =
r300VAPInputRoute1(&rmesa->hw.vir[1].cmd[R300_VIR_CNTL_0], swizzle,
nr);
/* Setup INPUT_CNTL. */
- /* I don't think this is needed for vertex buffers, but it doesn't hurt anything */
R300_STATECHANGE(rmesa, vic);
rmesa->hw.vic.cmd[R300_VIC_CNTL_0] = r300VAPInputCntl0(ctx, InputsRead);
rmesa->hw.vic.cmd[R300_VIC_CNTL_1] = r300VAPInputCntl1(ctx, InputsRead);
r300ReleaseDmaRegion(rmesa, &rmesa->state.aos[i], __FUNCTION__);
}
}
+
+void r300EmitCacheFlush(r300ContextPtr rmesa)
+{
+ int cmd_reserved = 0;
+ int cmd_written = 0;
+
+ drm_radeon_cmd_header_t *cmd = NULL;
+
+ reg_start(R300_RB3D_DSTCACHE_CTLSTAT, 0);
+ e32(R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
+ R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
+
+ reg_start(R300_ZB_ZCACHE_CTLSTAT, 0);
+ e32(R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
+ R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
+}
projects / mesa.git / blobdiff