cmd2[8].u = r300PackFloat32(ctx->Color.ClearColor[3]);
reg_start(R300_RB3D_DSTCACHE_CTLSTAT,0);
- e32(0x0000000a);
+ e32(R300_RB3D_DSTCACHE_UNKNOWN_0A);
- reg_start(0x4f18,0);
- e32(0x00000003);
+ reg_start(R300_RB3D_ZCACHE_CTLSTAT,0);
+ e32(R300_RB3D_ZCACHE_UNKNOWN_03);
cp_wait(rmesa, R300_WAIT_3D | R300_WAIT_3D_CLEAN);
}
int cmd_reserved = 0;
int cmd_written = 0;
drm_radeon_cmd_header_t *cmd = NULL;
-
-
+ int has_tcl = 1;
+
+ if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
+ has_tcl = 0;
+
R300_STATECHANGE(r300, vir[0]);
reg_start(R300_VAP_INPUT_ROUTE_0_0, 0);
- e32(0x21030003);
+ if (!has_tcl)
+ e32(0x22030003);
+ else
+ e32(0x21030003);
/* disable fog */
R300_STATECHANGE(r300, fogs);
reg_start(R300_VAP_INPUT_CNTL_0, 1);
e32(0x00000001);
e32(0x00000405);
-
+
+ if (!has_tcl) {
+ R300_STATECHANGE(r300, vte);
+ /* comes from fglrx startup of clear */
+ reg_start(R300_SE_VTE_CNTL, 1);
+ e32(0x043f);
+ e32(0x8);
+
+ reg_start(0x21dc, 0);
+ e32(0xaaaaaaaa);
+ }
+
R300_STATECHANGE(r300, vof);
reg_start(R300_VAP_OUTPUT_VTX_FMT_0, 1);
e32(R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT);
reg_start(R300_PFS_INSTR3_0, 0);
e32(FP_SELA(0,NO,W,FP_TMP(0),0,0));
-
- R300_STATECHANGE(r300, pvs);
- reg_start(R300_VAP_PVS_CNTL_1, 2);
- e32((0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT) |
- (0 << R300_PVS_CNTL_1_POS_END_SHIFT) |
- (1 << R300_PVS_CNTL_1_PROGRAM_END_SHIFT));
- e32(0);
- e32(1 << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT);
-
- R300_STATECHANGE(r300, vpi);
- vsf_start_fragment(0x0, 8);
- e32(VP_OUT(ADD,OUT,0,XYZW));
- e32(VP_IN(IN,0));
- e32(VP_ZERO());
- e32(0);
-
- e32(VP_OUT(ADD,OUT,1,XYZW));
- e32(VP_IN(IN,1));
- e32(VP_ZERO());
- e32(0);
+
+ if (has_tcl) {
+ R300_STATECHANGE(r300, pvs);
+ reg_start(R300_VAP_PVS_CNTL_1, 2);
+ e32((0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT) |
+ (0 << R300_PVS_CNTL_1_POS_END_SHIFT) |
+ (1 << R300_PVS_CNTL_1_PROGRAM_END_SHIFT));
+ e32(0);
+ e32(1 << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT);
+
+ R300_STATECHANGE(r300, vpi);
+ vsf_start_fragment(0x0, 8);
+ e32(VP_OUT(ADD,OUT,0,XYZW));
+ e32(VP_IN(IN,0));
+ e32(VP_ZERO());
+ e32(0);
+
+ e32(VP_OUT(ADD,OUT,1,XYZW));
+ e32(VP_IN(IN,1));
+ e32(VP_ZERO());
+ e32(0);
+ }
/*reg_start(0x4500,0);
e32(2560-1);*/
_swrast_Clear(ctx, mask);
}
- swapped = r300->radeon.doPageFlip && (r300->radeon.sarea->pfCurrentPage == 1);
+ swapped = r300->radeon.sarea->pfCurrentPage == 1;
/* Make sure it fits there. */
r300EnsureCmdBufSpace(r300, 421*3, __FUNCTION__);
#ifdef USER_BUFFERS
#include "radeon_mm.h"
-void r300RefillCurrentDmaRegion(r300ContextPtr rmesa, int size)
+static void r300RefillCurrentDmaRegion(r300ContextPtr rmesa, int size)
{
struct r300_dma_buffer *dmabuf;
size = MAX2(size, RADEON_BUFFER_SIZE*16);
#ifdef HW_VBOS
if (dmabuf->id == 0) {
/* Just kick all */
- r300_evict_vbos(rmesa->radeon.glCtx, /*RADEON_BUFFER_SIZE*16*/1<<30);
+ r300EvictVBOs(rmesa->radeon.glCtx, /*RADEON_BUFFER_SIZE*16*/1<<30);
dmabuf->id = radeon_mm_alloc(rmesa, 4, size);
}
#endif
}
#else
-void r300RefillCurrentDmaRegion(r300ContextPtr rmesa)
+static void r300RefillCurrentDmaRegion(r300ContextPtr rmesa)
{
struct r300_dma_buffer *dmabuf;
int fd = rmesa->radeon.dri.fd;