R1xx/r2xx: Don't use an alpha texture format for GLX_TEXTURE_FORMAT_RGB_EXT

[mesa.git] / src / mesa / drivers / dri / r300 / r300_texstate.c

diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c
index d16cf688ed583ef9ffa5f099aded662b638b8514..6d6a90aa88a288b02fe41519c042aa8e7454cd39 100644 (file)
--- a/src/mesa/drivers/dri/r300/r300_texstate.c
+++ b/src/mesa/drivers/dri/r300/r300_texstate.c
@@ -117,6 +117,7 @@ static const struct tx_table {
        _ASSIGN(INTENSITY_FLOAT16, R300_EASY_TX_FORMAT(X, X, X, X, FL_I16)),
        _ASSIGN(Z16, R300_EASY_TX_FORMAT(X, X, X, X, X16)),
        _ASSIGN(Z24_S8, R300_EASY_TX_FORMAT(X, X, X, X, X24_Y8)),
+       _ASSIGN(S8_Z24, R300_EASY_TX_FORMAT(Y, Y, Y, Y, X24_Y8)),
        _ASSIGN(Z32, R300_EASY_TX_FORMAT(X, X, X, X, X32)),
        /* *INDENT-ON* */
 };
@@ -268,40 +269,29 @@ static GLboolean r300_validate_texture(GLcontext * ctx, struct gl_texture_object
        return GL_TRUE;
 }
 
-
 /**
  * Ensure all enabled and complete textures are uploaded along with any buffers being used.
  */
 GLboolean r300ValidateBuffers(GLcontext * ctx)
 {
        r300ContextPtr rmesa = R300_CONTEXT(ctx);
-       struct radeon_cs_space_check bos[16];
        struct radeon_renderbuffer *rrb;
-       int num_bo = 0;
        int i;
-       int flushed = 0, ret;
-again:
-       num_bo = 0;
+
+       radeon_validate_reset_bos(&rmesa->radeon);
 
        rrb = radeon_get_colorbuffer(&rmesa->radeon);
        /* color buffer */
        if (rrb && rrb->bo) {
-               bos[num_bo].bo = rrb->bo;
-               bos[num_bo].read_domains = 0;
-               bos[num_bo].write_domain = RADEON_GEM_DOMAIN_VRAM;
-               bos[num_bo].new_accounted = 0;
-               num_bo++;
+               radeon_validate_bo(&rmesa->radeon, rrb->bo,
+                                  0, RADEON_GEM_DOMAIN_VRAM);
        }
 
        /* depth buffer */
        rrb = radeon_get_depthbuffer(&rmesa->radeon);
-       /* color buffer */
        if (rrb && rrb->bo) {
-               bos[num_bo].bo = rrb->bo;
-               bos[num_bo].read_domains = 0;
-               bos[num_bo].write_domain = RADEON_GEM_DOMAIN_VRAM;
-               bos[num_bo].new_accounted = 0;
-               num_bo++;
+               radeon_validate_bo(&rmesa->radeon, rrb->bo,
+                                  0, RADEON_GEM_DOMAIN_VRAM);
        }
        
        for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) {
@@ -317,26 +307,17 @@ again:
                }
                t = radeon_tex_obj(ctx->Texture.Unit[i]._Current);
                if (t->image_override && t->bo)
-                       bos[num_bo].bo = t->bo;
+                       radeon_validate_bo(&rmesa->radeon, t->bo,
+                                          RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
+
                else if (t->mt->bo)
-                       bos[num_bo].bo = t->mt->bo;
-               bos[num_bo].read_domains = RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM;
-               bos[num_bo].write_domain = 0;
-               bos[num_bo].new_accounted = 0;
-               num_bo++;
+                       radeon_validate_bo(&rmesa->radeon, t->mt->bo,
+                                          RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
        }
+       if (rmesa->radeon.dma.current)
+               radeon_validate_bo(&rmesa->radeon, rmesa->radeon.dma.current, RADEON_GEM_DOMAIN_GTT, 0);
 
-       ret = radeon_cs_space_check(rmesa->radeon.cmdbuf.cs, bos, num_bo);
-       if (ret == RADEON_CS_SPACE_OP_TO_BIG)
-               return GL_FALSE;
-       if (ret == RADEON_CS_SPACE_FLUSH) {
-               radeonFlush(ctx);
-               if (flushed)
-                       return GL_FALSE;
-               flushed = 1;
-               goto again;
-       }
-       return GL_TRUE;
+       return radeon_revalidate_bos(ctx);
 }
 
 void r300SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
@@ -451,12 +432,12 @@ void r300SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_fo
                radeon_miptree_unreference(rImage->mt);
                rImage->mt = NULL;
        }
-       fprintf(stderr,"settexbuf %dx%d@%d targ %x format %x\n", rb->width, rb->height, rb->cpp, target, format);
        _mesa_init_teximage_fields(radeon->glCtx, target, texImage,
                                   rb->width, rb->height, 1, 0, rb->cpp);
+       texImage->RowStride = rb->pitch / rb->cpp;
        texImage->TexFormat = radeonChooseTextureFormat(radeon->glCtx,
                                                        internalFormat,
-                                                       type, format);
+                                                       type, format, 0);
        rImage->bo = rb->bo;
        radeon_bo_ref(rImage->bo);
        t->bo = rb->bo;
@@ -468,7 +449,10 @@ void r300SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_fo
        pitch_val = rb->pitch;
        switch (rb->cpp) {
        case 4:
-               t->pp_txformat = R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8);
+               if (glx_texture_format == GLX_TEXTURE_FORMAT_RGB_EXT)
+                       t->pp_txformat = R300_EASY_TX_FORMAT(X, Y, Z, ONE, W8Z8Y8X8);
+               else
+                       t->pp_txformat = R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8);
                t->pp_txfilter |= tx_table[2].filter;
                pitch_val /= 4;
                break;