#include "radeon_mipmap_tree.h"
#include "radeon_reg.h"
+struct r600_cs_manager_legacy
+{
+ struct radeon_cs_manager base;
+ struct radeon_context *ctx;
+ /* hack for scratch stuff */
+ uint32_t pending_age;
+ uint32_t pending_count;
+};
+
+struct r600_cs_reloc_legacy {
+ struct radeon_cs_reloc base;
+ uint32_t cindices;
+ uint32_t *indices;
+ uint32_t *reloc_indices;
+};
static struct radeon_cs * r600_cs_create(struct radeon_cs_manager *csm,
return cs;
}
-int r600_cs_write_reloc(struct radeon_cs *cs,
- struct radeon_bo *bo,
- uint32_t read_domain,
- uint32_t write_domain,
- uint32_t flags)
+static int r600_cs_write_reloc(struct radeon_cs *cs,
+ struct radeon_bo *bo,
+ uint32_t read_domain,
+ uint32_t write_domain,
+ uint32_t flags)
{
struct r600_cs_reloc_legacy *relocs;
int i;
if (cs->cdw + ndw > cs->ndw) {
uint32_t tmp, *ptr;
- int num = (ndw > 0x3FF) ? ndw : 0x3FF;
+ int num = (ndw > 0x400) ? ndw : 0x400;
- tmp = (cs->cdw + 1 + num) & (~num);
+ tmp = (cs->cdw + num + 0x3FF) & (~0x3FF);
ptr = (uint32_t*)realloc(cs->packets, 4 * tmp);
if (ptr == NULL) {
return -ENOMEM;
return -EPIPE;
}
+ if (cs->cdw > cs->ndw) {
+ fprintf(stderr, "CS section overflow at (%s,%s,%d) cdw %d ndw %d\n",
+ cs->section_file, cs->section_func, cs->section_line,cs->cdw,cs->ndw);
+ fprintf(stderr, "CS section end at (%s,%s,%d)\n",
+ file, func, line);
+ assert(0);
+ }
+
return 0;
}
relocs = (struct r600_cs_reloc_legacy *)cs->relocs;
restart:
for (i = 0; i < cs->crelocs; i++) {
- uint32_t soffset, eoffset, asicoffset;
+ uint32_t soffset, eoffset;
r = radeon_bo_legacy_validate(relocs[i].base.bo,
&soffset, &eoffset);
goto restart;
}
if (r) {
- fprintf(stderr, "validated %p [0x%08X, 0x%08X]\n",
+ fprintf(stderr, "invalid bo(%p) [0x%08X, 0x%08X]\n",
relocs[i].base.bo, soffset, eoffset);
return r;
}
- asicoffset = soffset;
for (j = 0; j < relocs[i].cindices; j++) {
- if (asicoffset >= eoffset) {
- /* radeon_bo_debug(relocs[i].base.bo, 12); */
- fprintf(stderr, "validated %p [0x%08X, 0x%08X]\n",
- relocs[i].base.bo, soffset, eoffset);
- fprintf(stderr, "above end: %p 0x%08X 0x%08X\n",
- relocs[i].base.bo,
- cs->packets[relocs[i].indices[j]],
- eoffset);
- exit(0);
- return -EINVAL;
- }
/* pkt3 nop header in ib chunk */
cs->packets[relocs[i].reloc_indices[j]] = 0xC0001000;
/* reloc index in ib chunk */
}
/* asic offset in reloc chunk */ /* see alex drm r600_nomm_relocate */
- reloc_chunk[offset_dw] = asicoffset;
+ reloc_chunk[offset_dw] = soffset;
reloc_chunk[offset_dw + 3] = 0;
offset_dw += 4;
return 0;
}
+#if 0
static void dump_cmdbuf(struct radeon_cs *cs)
{
int i;
fprintf(stderr,"--end--\n");
}
+#endif
static int r600_cs_emit(struct radeon_cs *cs)
{
struct drm_radeon_cs_chunk cs_chunk[2];
uint32_t length_dw_reloc_chunk;
uint64_t chunk_ptrs[2];
- uint32_t reloc_chunk[256];
+ uint32_t *reloc_chunk;
int r;
int retry = 0;
csm->pending_count = 1;
- r = r600_cs_process_relocs(cs, &(reloc_chunk[0]), &length_dw_reloc_chunk);
+ reloc_chunk = (uint32_t*)calloc(1, cs->crelocs * 4 * 4);
+
+ r = r600_cs_process_relocs(cs, reloc_chunk, &length_dw_reloc_chunk);
if (r) {
+ free(reloc_chunk);
return 0;
}
/* reloc chaunk */
cs_chunk[1].chunk_id = RADEON_CHUNK_ID_RELOCS;
cs_chunk[1].length_dw = length_dw_reloc_chunk;
- cs_chunk[1].chunk_data = (unsigned long)&(reloc_chunk[0]);
+ cs_chunk[1].chunk_data = (unsigned long)reloc_chunk;
chunk_ptrs[0] = (uint64_t)(unsigned long)&(cs_chunk[0]);
chunk_ptrs[1] = (uint64_t)(unsigned long)&(cs_chunk[1]);
} while (r == -EAGAIN && retry < 1000);
if (r) {
+ free(reloc_chunk);
return r;
}
cs->csm->vram_write_used = 0;
cs->csm->gart_write_used = 0;
+ free(reloc_chunk);
+
return 0;
}
assert(rmesa->cmdbuf.cs != NULL);
rmesa->cmdbuf.size = size;
+ radeon_cs_space_set_flush(rmesa->cmdbuf.cs,
+ (void (*)(void *))rmesa->glCtx->Driver.Flush, rmesa->glCtx);
+
if (!rmesa->radeonScreen->kernel_mm) {
radeon_cs_set_limit(rmesa->cmdbuf.cs, RADEON_GEM_DOMAIN_VRAM, rmesa->radeonScreen->texSize[0]);
radeon_cs_set_limit(rmesa->cmdbuf.cs, RADEON_GEM_DOMAIN_GTT, rmesa->radeonScreen->gartTextures.size);