#include "drivers/common/driverfuncs.h"
#include "r600_context.h"
-#include "radeon_context.h"
+#include "radeon_common_context.h"
#include "radeon_span.h"
#include "r600_cmdbuf.h"
#include "r600_emit.h"
#include "radeon_bocs_wrapper.h"
-#include "r700_chip.h"
#include "r700_state.h"
#include "r700_ioctl.h"
#include "extension_helper.h"
+extern const struct tnl_pipeline_stage *r700_pipeline[];
const struct dri_extension card_extensions[] = {
/* *INDENT-OFF* */
static void r600_fallback(GLcontext *ctx, GLuint bit, GLboolean mode)
{
- r600ContextPtr r600 = R600_CONTEXT(ctx);
+ context_t *context = R700_CONTEXT(ctx);
if (mode)
- r600->radeon.Fallback |= bit;
+ context->radeon.Fallback |= bit;
else
- r600->radeon.Fallback &= ~bit;
+ context->radeon.Fallback &= ~bit;
}
static void r600_init_vtbl(radeonContextPtr radeon)
radeon->vtbl.fallback = r600_fallback;
}
-/* to be enabled */
-static GLboolean r600LoadMemSurf(context_t *context,
- GLuint dst_offset, /* gpu addr */
- GLuint dst_pitch_in_pixel,
- GLuint src_width_in_pixel,
- GLuint height,
- GLuint byte_per_pixel,
- unsigned char* pSrc) /* source data */
-{
- return GL_TRUE;
-}
-/* to be enabled */
-static GLboolean r600AllocMemSurf(context_t *context,
- void **ppmemBlock,
- void **ppheap,
- GLuint *prefered_heap, /* Now used RADEON_LOCAL_TEX_HEAP, return actual heap used. */
- GLuint totalSize)
-{
- return GL_TRUE;
-}
-
-/* to be enabled */
-static void r600MemUse(context_t *context, int id)
-{
-}
-
/* Create the device specific rendering context.
*/
GLboolean r600CreateContext(const __GLcontextModes * glVisual,
__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
struct dd_function_table functions;
- r600ContextPtr r600;
+ context_t *r600;
GLcontext *ctx;
- int tcl_mode;
assert(glVisual);
assert(driContextPriv);
assert(screen);
/* Allocate the R600 context */
- r600 = (r600ContextPtr) CALLOC(sizeof(*r600));
+ r600 = (context_t*) CALLOC(sizeof(*r600));
if (!r600)
return GL_FALSE;
*/
_mesa_init_driver_functions(&functions);
- r700InitChipObject(r600); /* let the eag... */
-
- (r600->chipobj.InitFuncs)(&functions);
- r600->chipobj.EmitShader = r600EmitShader;
- r600->chipobj.DeleteShader = r600DeleteShader;
- r600->chipobj.LoadMemSurf = r600LoadMemSurf;
- r600->chipobj.AllocMemSurf = r600AllocMemSurf;
- r600->chipobj.MemUse = r600MemUse;
+ r700InitStateFuncs(&functions);
+ r600InitTextureFuncs(&functions);
+ r700InitShaderFuncs(&functions);
+ r700InitIoctlFuncs(&functions);
if (!radeonInitContext(&r600->radeon, &functions,
glVisual, driContextPriv,
ctx->Const.MaxTextureMaxAnisotropy = 16.0;
ctx->Const.MaxTextureLodBias = 16.0;
- if (screen->chip_family >= CHIP_FAMILY_RV515) {
- ctx->Const.MaxTextureLevels = 13;
- ctx->Const.MaxTextureRectSize = 4096;
- }
+ ctx->Const.MaxTextureLevels = 13;
+ ctx->Const.MaxTextureRectSize = 4096;
ctx->Const.MinPointSize = 0x0001 / 8.0;
ctx->Const.MinPointSizeAA = 0x0001 / 8.0;
/* Install the customized pipeline:
*/
_tnl_destroy_pipeline(ctx);
- _tnl_install_pipeline(ctx, (const struct tnl_pipeline_stage **)(r600->chipobj.stages));
+ _tnl_install_pipeline(ctx, r700_pipeline);
/* Try and keep materials and vertices separate:
*/
_tnl_allow_vertex_fog(ctx, GL_TRUE);
/* currently bogus data */
- if (screen->chip_flags & RADEON_CHIPSET_TCL) {
- ctx->Const.VertexProgram.MaxInstructions = VSF_MAX_FRAGMENT_LENGTH / 4;
- ctx->Const.VertexProgram.MaxNativeInstructions =
- VSF_MAX_FRAGMENT_LENGTH / 4;
- ctx->Const.VertexProgram.MaxNativeAttribs = 16; /* r420 */
- ctx->Const.VertexProgram.MaxTemps = 32;
- ctx->Const.VertexProgram.MaxNativeTemps =
- /*VSF_MAX_FRAGMENT_TEMPS */ 32;
- ctx->Const.VertexProgram.MaxNativeParameters = 256; /* r420 */
- ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
- }
+ ctx->Const.VertexProgram.MaxInstructions = VSF_MAX_FRAGMENT_LENGTH / 4;
+ ctx->Const.VertexProgram.MaxNativeInstructions =
+ VSF_MAX_FRAGMENT_LENGTH / 4;
+ ctx->Const.VertexProgram.MaxNativeAttribs = 16; /* r420 */
+ ctx->Const.VertexProgram.MaxTemps = 32;
+ ctx->Const.VertexProgram.MaxNativeTemps =
+ /*VSF_MAX_FRAGMENT_TEMPS */ 32;
+ ctx->Const.VertexProgram.MaxNativeParameters = 256; /* r420 */
+ ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
ctx->Const.FragmentProgram.MaxNativeTemps = PFS_NUM_TEMP_REGS;
ctx->Const.FragmentProgram.MaxNativeAttribs = 11; /* copy i915... */
_mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
}
- r600->disable_lowimpact_fallback =
- driQueryOptionb(&r600->radeon.optionCache,
- "disable_lowimpact_fallback");
radeon_fbo_init(&r600->radeon);
radeonInitSpanFuncs( ctx );
r600InitCmdBuf(r600);
- (r600->chipobj.InitState)(r600->radeon.glCtx);
+ r700InitState(r600->radeon.glCtx);
TNL_CONTEXT(ctx)->Driver.RunPipeline = r600RunPipeline;
- tcl_mode = driQueryOptioni(&r600->radeon.optionCache, "tcl_mode");
if (driQueryOptionb(&r600->radeon.optionCache, "no_rast")) {
fprintf(stderr, "disabling 3D acceleration\n");
#if R200_MERGED
FALLBACK(&r600->radeon, RADEON_FALLBACK_DISABLE, 1);
#endif
}
- if (tcl_mode == DRI_CONF_TCL_SW ||
- !(r600->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
- if (r600->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
- r600->radeon.radeonScreen->chip_flags &=
- ~RADEON_CHIPSET_TCL;
- fprintf(stderr, "Disabling HW TCL support\n");
- }
- TCL_FALLBACK(r600->radeon.glCtx,
- RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
- }
return GL_TRUE;
}
-/* Clean our own things only, radeonDestroyContext will do every thing else. */
-void
-r600DestroyContext (__DRIcontextPrivate * driContextPriv)
-{
- GET_CURRENT_CONTEXT (ctx);
- context_t *context = ctx ? R700_CONTEXT(ctx) : NULL;
-
- if (context)
- (context->chipobj.DestroyChipObj)(context->chipobj.pvChipObj);
-}
-
-