Merge branch '7.8'

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_blit.c

diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c
index ff32b7d69e68b4527482f638d7db7c48875a5814..143822361e1504b001a3899adc5de0b9e35adee9 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_blit.c
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.c
@@ -38,7 +38,7 @@ static inline uint32_t cmdpacket0(struct radeon_screen *rscrn,
 }
 
 /* common formats supported as both textures and render targets */
-static unsigned is_blit_supported(gl_format mesa_format)
+unsigned r100_check_blit(gl_format mesa_format)
 {
     /* XXX others?  BE/LE? */
     switch (mesa_format) {
@@ -48,6 +48,8 @@ static unsigned is_blit_supported(gl_format mesa_format)
     case MESA_FORMAT_ARGB4444:
     case MESA_FORMAT_ARGB1555:
     case MESA_FORMAT_A8:
+    case MESA_FORMAT_L8:
+    case MESA_FORMAT_I8:
            break;
     default:
            return 0;
@@ -103,6 +105,9 @@ static void inline emit_tx_setup(struct r100_context *r100,
     case MESA_FORMAT_ARGB8888:
            txformat |= RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP;
            break;
+    case MESA_FORMAT_RGBA8888:
+            txformat |= RADEON_TXFORMAT_RGBA8888 | RADEON_TXFORMAT_ALPHA_IN_MAP;
+            break;
     case MESA_FORMAT_XRGB8888:
            txformat |= RADEON_TXFORMAT_ARGB8888;
            break;
@@ -116,8 +121,15 @@ static void inline emit_tx_setup(struct r100_context *r100,
            txformat |= RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP;
            break;
     case MESA_FORMAT_A8:
+    case MESA_FORMAT_I8:
            txformat |= RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP;
            break;
+    case MESA_FORMAT_L8:
+            txformat |= RADEON_TXFORMAT_I8;
+            break;
+    case MESA_FORMAT_AL88:
+            txformat |= RADEON_TXFORMAT_AI88 | RADEON_TXFORMAT_ALPHA_IN_MAP;
+            break;
     default:
            break;
     }
@@ -157,7 +169,7 @@ static inline void emit_cb_setup(struct r100_context *r100,
                                 unsigned width,
                                 unsigned height)
 {
-    uint32_t dst_pitch = pitch * _mesa_get_format_bytes(mesa_format);
+    uint32_t dst_pitch = pitch;
     uint32_t dst_format = 0;
     BATCH_LOCALS(&r100->radeon);
 
@@ -177,6 +189,8 @@ static inline void emit_cb_setup(struct r100_context *r100,
            dst_format = RADEON_COLOR_FORMAT_ARGB1555;
            break;
     case MESA_FORMAT_A8:
+    case MESA_FORMAT_L8:
+    case MESA_FORMAT_I8:
            dst_format = RADEON_COLOR_FORMAT_RGB8;
            break;
     default:
@@ -204,15 +218,16 @@ static GLboolean validate_buffers(struct r100_context *r100,
                                   struct radeon_bo *dst_bo)
 {
     int ret;
-    radeon_cs_space_add_persistent_bo(r100->radeon.cmdbuf.cs,
-                                      src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
 
-    radeon_cs_space_add_persistent_bo(r100->radeon.cmdbuf.cs,
-                                      dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
+    radeon_cs_space_reset_bos(r100->radeon.cmdbuf.cs);
 
     ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
-                                        first_elem(&r100->radeon.dma.reserved)->bo,
-                                        RADEON_GEM_DOMAIN_GTT, 0);
+                                        src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
+    if (ret)
+        return GL_FALSE;
+
+    ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
+                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
     if (ret)
         return GL_FALSE;
 
@@ -234,9 +249,8 @@ static inline void calc_tex_coords(float img_width, float img_height,
     buf[3] = buf[2] + reg_height / img_height;
     if (flip_y)
     {
-        float tmp = buf[2];
-        buf[2] = 1.0 - buf[3];
-        buf[3] = 1.0 - tmp;
+        buf[2] = 1.0 - buf[2];
+        buf[3] = 1.0 - buf[3];
     }
 }
 
@@ -259,17 +273,17 @@ static inline void emit_draw_packet(struct r100_context *r100,
     verts[0] = dst_x_offset;
     verts[1] = dst_y_offset + reg_height;
     verts[2] = texcoords[0];
-    verts[3] = texcoords[2];
+    verts[3] = texcoords[3];
 
     verts[4] = dst_x_offset + reg_width;
     verts[5] = dst_y_offset + reg_height;
     verts[6] = texcoords[1];
-    verts[7] = texcoords[2];
+    verts[7] = texcoords[3];
 
     verts[8] = dst_x_offset + reg_width;
     verts[9] = dst_y_offset;
     verts[10] = texcoords[1];
-    verts[11] = texcoords[3];
+    verts[11] = texcoords[2];
 
     BEGIN_BATCH(15);
     OUT_BATCH(RADEON_CP_PACKET3_3D_DRAW_IMMD | (13 << 16));
@@ -330,7 +344,7 @@ unsigned r100_blit(GLcontext *ctx,
 {
     struct r100_context *r100 = R100_CONTEXT(ctx);
 
-    if (!is_blit_supported(dst_mesaformat))
+    if (!r100_check_blit(dst_mesaformat))
         return GL_FALSE;
 
     /* Make sure that colorbuffer has even width - hw limitation */